XVME 200/290 Manual
December, 1987
Chapter 3
MODULE PROGRAMMING
3.1 INTRODUCTION
This chapter will briefly examine the addressing, and initialization procedures and
constraints required when programming the XVME-200 and XVME-290 DIO Modules.
In order to demonstrate the correct sequence of initialization for the ports and
registers contained in the 68230 PI/T chips, two programming examples (with
comments) have been incorporated in this chapter.
For a complete explanation on
how to program and maximize the functionality of the 68230 PI/T chip, refer to the
accompanying 68230 Manual.
3.2 MODULE ADDRESSING
The XVME-200 and XVME-290 DIO Modules are designed to be addressed within the
VMEbus-defined 64K short I/O address space.
When the DIO Module is installed in
the system it will occupy a 1K byte block of the short I/O address space. The base
address decoding scheme for the XVME I/O modules is such that the starting
address for each board resides on a 1K boundary.
Thus, there are 64 possible
locations (1K boundaries) in the short I/O address space which could be used as the
base address for the DIO Module (refer to Section 2.4.1 for the list of base
addresses and their corresponding jumper configurations).
The logical registers/ports utilized for the transfer of data on the XVME-200 and
XVME-290 Modules are all contained within the 68230 PI/T devices. All register
locations within the 68230 devices are given specific addresses which are offset
from the module base address (Table 3-1 lists the offsets specified for the registers
used in the 68230 chips).
3 - 1
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