MTi 1-series User Manual
Xsens MTi User Manual Repository
Datasheet
Copyright © 2021 Xsens
Page 29
Data transmit behaviour under CTS
The RTS signal is an output for the module. If the RTS line is high, the module is busy and
unable to receive new data. Otherwise, the module’s UART is idle and ready to receive. After
receiving a byte, the direct memory access (DMA) controller of the module will transfer the byte
to its receive first in first out (FIFO) buffer. The module will raise the RTS signal during this
transfer. Therefore, with every byte received, the module raises the RTS line quickly. The figure
below shows this behaviour.
RTS behaviour under data reception
The user can use this communication mode without hardware flow control. In this case, the
user must tie the CTS line low (GND) to make the module transmit.
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