13 Communication
252 SD780 Series Servo Technical Manual
13.5 Communication frame error check mode:
The error check mode of the frame mainly includes two parts of the check, that is, the bit check of
the byte (odd/even check) and the entire data check of the frame (CRC check or LRC check).
13.5.1 Byte Bit Check
Users can choose different bit verification methods as needed, or they can choose no parity, which
will affect the parity bit setting of each byte.
The meaning of even parity: an even parity bit is added before data transmission to indicate
whether the number of “1” in the transmitted data is odd or even. When it is even, the check
position is “0”, otherwise it is set. It is “1” to keep the parity of the data unchanged.
The meaning of the odd check: an odd parity bit is added before the data transmission to indicate
whether the number of “1” in the transmitted data is odd or even. When it is odd, the check position
is “0”, otherwise it is set. It is “1” to keep the parity of the data unchanged.
For example, you need to transfer “11001110”, the data contains 5 “1”, if you use even parity, its
even parity bit is “1”, if you use odd parity, its odd parity bit is “0”, transmission In the case of data,
the parity bit is calculated at the position of the check bit of the frame, and the receiving device
also performs parity check. If the parity of the accepted data is found to be inconsistent with the
preset, it is considered that the communication has an error.
13.5.2 CRC check method --- CRC (Cyclical Redundancy Check)
Using the RTU frame format, the frame includes a frame error detection field calculated based on
the CRC method. The CRC field detects the contents of the entire frame. The CRC field is two
bytes and contains a 16-bit binary value. It is calculated by the transmission device and added to
the frame. The receiving device recalculates the CRC of the received frame and compares it with
the value in the received CRC field. If the two CRC values are not equal, the transmission has an
error.
The CRC is first stored in 0xFFFF, and then a procedure is called to process the consecutive 6 or
more bytes in the frame with the values in the current register. Only the 8Bit data in each character
is valid for the CRC, and the start and stop bits as well as the parity bit are invalid.
During the CRC generation process, each 8-bit character is individually different from the register
contents (XOR), and the result moves to the least significant bit direction, and the most significant
bit is padded with 0. The LSB is extracted and detected. If the LSB is 1, the register is individually
or different from the preset value. If the LSB is 0, it is not performed. The entire process is
repeated 8 times. After the last bit (bit 8) is completed, the next octet is individually different from
the current value of the register. The value in the final register is the CRC value after all the bytes
in the frame have been executed.
This calculation method of CRC adopts the international standard CRC check rule. When editing
the CRC algorithm, the user can refer to the CRC algorithm of the relevant standard to write a
CRC calculation program that truly meets the requirements.
13.6 Error message response
When the slave responds, it uses the function code field and the fault address to indicate whether
