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User Manual for Machine Vision Cameras
116
Figure 11
-
48
Input logic level
To prevent damage to the GPIO pin, connect the GND pin before entering voltage to the Line2 pin.
Input rise delay (TDR): 0.02us
Input drop delay (TDF): 0.02us
2, Line2/line3 set as output pin
The maximum current allowed through this pin is 25 mA.
When the ambient temperature is 25 degrees Celsius, the relationships between the external voltage, resistance and
output low level are shown in Table 11
External voltage
Non-essential resistance
VL (GPIO)
3.3V
1KΩ
0.11V
5V
1KΩ
0.167V
12V
2.4KΩ
0.184V
24V
4.7KΩ
0.385V
Table 11
-
11
Non
-
isolated output logic’s low level parameters
The external pull
-
up voltage 5V pull
-
up resistance 1KΩ, GPIO output logic level, electrical characteristics are shown
in Figure 11
Figure 11
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49
Output logic level
Parameter name
Parameter symbol
Parameter values
Output rise time
TR
0.08us
Output downtime
TF
0.02us
Output rising delay
TDR
0.1us
Output drop delay
TDF
0.04us
Table 11
-
12
Non
-
isolated output’s electrical characteristics
11.11
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