DP120F/DP125F Circuit Description
7-96
March 2000 © TOSHIBA TEC
7.1 Power Supply Voltage Generation
The power supply voltage generation circuit converts the AC voltage to DC voltages of +24V,
±12V and +5V and delivers them to the entire system.
When the power switch of this machine is turned on, an AC voltage is input from the inlet. The
input AC voltage is passed through the noise filter, rectified to a DC voltage by the diode bridge
(DB1), and then smoothed by C6.
When the DC voltage is applied, voltage is applied to the gate of Q10 through R65 and R61 to
turn on Q10 and current flows through winding Np in the primary circuit of the transformer (T1).
Then voltage is produced in winding Nb and voltage is applied to the gate of Q10 through R6
and R5 to maintain the on state of Q10. At the same time, current begins to flow in the base of
Q2 through R9 and ZD2.
As Q10 continues to maintain its on state, the voltage produced from Nb rises. Then, the base
current of Q2 also increases to turn on Q2. This causes the gate voltage of Q10 to drop to turn
off Q10. When Q10 turns off, the energy accumulated in the transformer allows current to flow
from each winding in the secondary circuit.
After that, the current ends flowing as the accumulated energy runs out. However, residual
energy is present in each winding in the secondary circuit. This energy causes voltage to be
produced in winding Nb in the primary circuit to turn on Q10 again.
In this way, the switching operation performed by Q10 allows a high-frequency voltage to be
produced in each winding in the secondary circuit. The produced voltage is rectified by the
diodes (D1, D2, D5, D15, D16) and smoothed by capacitors (C13, C14, C15, C16, C35, C36).
Then, it is converted to stable DC voltages (+24V, ±12V, +5V) by the regulators (IC1 to IC4)
before being delivered to the system.
As the output load of the LVPS becomes larger, the time for the on state of Q10 becomes
longer to obtain the energy required. However, being determined according to the time con-
stant of the equivalent series resistance of R9, R10 and ZD2, the maximum on time of Q10
does not extend beyond a certain value and the output voltage drops for protection against
overcurrent.
Fig. 7-7-2
07-07-01
Содержание DP120F
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Страница 316: ...March 2000 TOSHIBA TEC 7 7 DP120F DP125F Circuit Description 1 2 Block Diagram 07 01 10 Fig 7 1 7 ...
Страница 337: ...DP120F DP125F Circuit Description 7 28 March 2000 TOSHIBA TEC 3 1 Memory Circuit Fig 7 3 1 07 03 01 ...
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Страница 579: ...March 2000 TOSHIBA TEC 9 15 DP120F DP125F Dialing and Communication Procedure b Standard procedure ...
Страница 654: ...DP120F DP125F Troubleshooting 11 42 March 2000 TOSHIBA TEC 2 3 Flow Chart Recommended for Field Service ...
Страница 655: ...March 2000 TOSHIBA TEC 11 43 DP120F DP125F Troubleshooting 2 4 Flow Chart Recommended for Telephone Screening ...
Страница 656: ...DP120F DP125F Troubleshooting 11 44 March 2000 TOSHIBA TEC ...
Страница 699: ...March 2000 TOSHIBA TEC 12 1 DP120F DP125F Appendix Chapter 12 Appendix 1 Sample List 1 1 Protocol Trace List ...
Страница 700: ...DP120F DP125F Appendix 12 2 March 2000 TOSHIBA TEC 1 2 Error Count List ...
Страница 701: ...March 2000 TOSHIBA TEC 12 3 DP120F DP125F Appendix 1 3 Function List for Maintenance ...
Страница 702: ...DP120F DP125F Appendix 12 4 March 2000 TOSHIBA TEC 1 4 Drum Unit ...
Страница 703: ...March 2000 TOSHIBA TEC 12 5 DP120F DP125F Appendix 1 5 Memory Dump List ...
Страница 706: ...SHUWA SHIBA PARK BLDG A 2 4 1 SHIBA KOEN MINATO KU TOKYO 105 8524 JAPAN ...