Texas Instruments TSW14J10, Руководство пользователя

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Hardware Configuration
7 SLAU580B – June 2014 – Revised September 2016
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TSW14J10 FMC-USB Interposer Card
Table 2. FPGA FMC Connector (J5) Description of the TSW14J10 (continued)
G36 G36 Spare connection
G37 G37 Spare connection
H37 H37 Spare connection
H38 H38 Spare connection
3.3.2 ADC/DAC FMC Connector
FMC connector J4 provides the interface between the TSW14J10EVM and an ADC or DAC EVM. In
addition to the JESD204B standard signals, 8 CMOS single-ended signals are sourced from the USB
interface to the FMC connector. These signals are used to allow the HSDC Pro GUI to control the SPI
serial programming of an ADC or DAC EVM that supports this feature. Several other spare signals are
available that connect between this connector and the FPGA FMC connector. The connector pinout
description is shown in
Table 3 .
Table 3. ADC/DAC EVM FMC Connector (J4) Description of the TSW14J10
FMC Signal Name FMC Pin Standard JESD204
Application Mapping Description
DP0_M2C_P/N C6/C7 Lane 0+/- (M->C) JESD Serial data transmitted from Mezzanine and received by Carrier
DP1_M2C_P/N A2/A3 Lane 1+/- (M->C) JESD Serial data transmitted from Mezzanine and received by Carrier
DP2_M2C_P/N A6/A7 Lane 2+/- (M->C) JESD Serial data transmitted from Mezzanine and received by Carrier
DP3_M2C_P/N A10/A11 Lane 3+/- (M->C) JESD Serial data transmitted from Mezzanine and received by Carrier
DP4_M2C_P/N A14/A15 Lane 4+/- (M->C) JESD Serial data transmitted from Mezzanine and received by Carrier
DP5_M2C_P/N A18/A19 Lane 5+/- (M->C) JESD Serial data transmitted from Mezzanine and received by Carrier
DP6_M2C_P/N B16/B17 Lane 6+/- (M->C) JESD Serial data transmitted from Mezzanine and received by Carrier
DP7_M2C_P/N B12/B13 Lane 7+/- (M->C) JESD Serial data transmitted from Mezzanine and received by Carrier
DP8_M2C_P/N B8/B9 Lane 8+/- (M->C) JESD Serial data transmitted from Mezzanine and received by Carrier
DP9_M2C_P/N B4/B5 Lane 9+/- (M->C) JESD Serial data transmitted from Mezzanine and received by Carrier
DP0_C2M_P/N C2/C3 Lane 0+/- (C->M) JESD Serial data transmitted from Carrier and received by Mezzanine
DP1_C2M_P/N A22/A23 Lane 1+/- (C->M) JESD Serial data transmitted from Carrier and received by Mezzanine
DP2_C2M_P/N A26/A27 Lane 2+/- (C->M) JESD Serial data transmitted from Carrier and received by Mezzanine
DP3_C2M_P/N A30/A31 Lane 3+/- (C->M) JESD Serial data transmitted from Carrier and received by Mezzanine
DP4_C2M_P/N A34/A35 Lane 4+/- (C->M) JESD Serial data transmitted from Carrier and received by Mezzanine
DP5_C2M_P/N A38/A39 Lane 5+/- (C->M) JESD Serial data transmitted from Carrier and received by Mezzanine
DP6_C2M_P/N B36/B37 Lane 6+/- (C->M) JESD Serial data transmitted from Carrier and received by Mezzanine
DP7_C2M_P/N B32/B33 Lane 7+/- (C->M) JESD Serial data transmitted from Carrier and received by Mezzanine
DP8_C2M_P/N B28/B29 Lane 8+/- (C->M) JESD Serial data transmitted from Carrier and received by Mezzanine
DP9_C2M_P/N B24/B25 Lane 9+/- (C->M) JESD Serial data transmitted from Carrier and received by Mezzanine
GTX_CLKP/M D4/D5 /- (M->C) Primary carrier-bound reference clock required for FPGA gigabit transceivers.
Equivalent to device clock.
Device Clock, SYSREF, and SYNC
FMC Signal Name FMC Pin Standard JESD204
Application Mapping Description
CLK_LA0_P/N G6/G7 /- (M->C) Secondary carrier-bound device clock. Used for special FPGA functions such as
sampling SYSREF.
D8/D9 D8/D9 /- (C->M) Mezzanine-bound device clock. Used for low noise conversion clock.
CAR_SYSREFP/M G9/G10 /- (M->C) Carrier-bound SYSREF signal
D11/D12 D11/D12 /- (C->M) Mezzanine-bound SYSREF signal
SYNCP/M G12/G13 SYNC+/- (C>M) ADC Mezzanine-bound SYNC signal for use in class 0/1/2 JESD204 systems
DAC_SYNC_P/M F10/F11 DAC SYNC+/- (M>C) Carrier-bound SYNC signal for use in class 0/1/2 JESD204 systems
ALT_DAC_SYNC_PM F19/F20 Alt. DAC SYNC+/- (M>C) Alternate Carrier-bound SYNC signal for use in class 0/1/2 JESD204B systems
ALT_SYNCP/M H31/H32 Alt. SYNC+/- (C>M) Alternate ADC Mezzanine-bound SYNC signal. For use when SYNC (C->M) is
not available.
Special Purpose I/O