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Figure 8-15. Application Schematic
8.2.1.1 Design Requirements
The sensor parameters, including frequency, R
P
, and Q factor have to be within the design space of the
LDC3114 as specified in the
8.2.1.2 Detailed Design Procedure
The LDC3114 is a multichannel device. The italic
n
in the parameters below refers to the channel index:
1. Select system-based options:
• Select Normal or Low Power Mode of operation by setting the LPWRB pin to V
DD
or ground, respectively.
Configure the enable bits for all channels in
Register EN (Address 0x0C)
.
• Select the polarities of OUT
n
and INTB pins by configuring
Register OPOL_DPOL (Address 0x1C)
and
Register INTPOL (Address 0x11)
.
• Configure the sensor frequency setting in Registers SENSOR
n
_CONFIG (Addresses
0x20
,
0x22
,
0x24
,
0x26
).
2. Choose the sampling rate (80, 40, 20, 10, 5, 2.5, 1.25, or 0.625 SPS) based on system power consumption
requirement, and configure
Register NP_SCAN_RATE (Address 0x0D)
or
Register LP_SCAN_RATE
(Address 0x0F)
.
3. Choose the button sampling window based on power consumption and noise requirements (recommended:
1 ms to 8 ms). While a longer button sampling window provides better noise performance, 1 ms is typically
sufficient for most applications. Set SENCYC
n
and LCDIV in Registers SENSOR
n
_CONFIG (Addresses
0x20
,
0x22
,
0x24
,
0x26
) and
Register LC_DIVIDER (Address 0x17)
in the following steps:
• Calculate LCDIV = ceiling (log
2
(
f
SENSOR
n
×
t
SAMPLE
n
) – 12), where
f
SENSOR
n
is the sensor frequency in
MHz,
t
SAMPLE
n
is the button sampling window in µs.
• If LCDIV < 0, set it to 0.
• Adjust SENCYC
n
to get desired
t
SAMPLE
n
according to
t
SAMPLE
n
= 128 × (SENCYC
n
+ 1) × 2
LCDIV
/
f
SENSOR
n
.
SNOSDD0 – DECEMBER 2021
Copyright © 2021 Texas Instruments Incorporated
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