Table 7-2. LDC3114 Access Type Codes
Access Type
Code
Description
Read Type
R
R
Read
Write Type
W
W
Write
Reset or Default Value
-
n
Value after reset or the default
value
7.5.1.1 STATUS Register (Offset = 0h) [Reset = 40h]
STATUS is shown in
STATUS Register Field Descriptions
Return to the
Device status
Table 7-3. STATUS Register Field Descriptions
Bit
Field
Type
Reset
Description
7
OUT_STATUS
R
0h
Output Status
Logic OR of output OUTx bits. This field is cleared by reading this
register.
6
CHIP_READY
R
1h
Chip Ready Status
0h = Chip not ready after internal reset
1h = Chip ready after internal reset
5
RDY_TO_WRITE
R
0h
Ready to Write
Indicates if registers are ready to be written. See I2C Interface
section for more information.
0h = Registers not ready
1h = Registers ready
4
MAXOUT
R
0h
Maximum Output Code
Indicates if any channel button output data reaches the maximum
value (+0x7FF or -0x800). Cleared by a read of the status register.
0h = No maximum output code
1h = Maximum output code
3
FSM_WD
R
0h
Finite-State Machine Watchdog Error
Reports an error has occurred and conversions have been halted.
Cleared by a read of the status register.
0h = No error in finite-state machine
1h = Error in finite-state machine
2
LC_WD
R
0h
LC Sensor Watchdog Error
Reports an error when any LC oscillator fails to start. Cleared by a
read of the status register.
0h = No error in LC oscillator initialization
1h = Error in LC oscillator initialization
1
TIMEOUT
R
0h
Button Timeout
Reports when any button is asserted for more than 50 seconds.
Cleared by a read of the status register. When DIS_BTN_TO is set,
no timeout is asserted
0h = no timeout error
1h = timeout error
SNOSDD0 – DECEMBER 2021
Copyright © 2021 Texas Instruments Incorporated
17