Texas Instruments BQ76942, Руководство пользователя

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Table 6-1. BQ76942 TQFP Package (PFB) Pin Functions (continued)
PIN
I/O TYPE DESCRIPTION
NO. NAME
4 VC8 I IA
Sense voltage input pin for the eighth cell from the bottom of the stack, balance current
input for the eighth cell from the bottom of the stack, and return balance current for the
ninth cell from the bottom of the stack
5 NC — — This pin is not connected to silicon.
6 VC7 I IA
Sense voltage input pin for the seventh cell from the bottom of the stack, balance current
input for the seventh cell from the bottom of the stack and return balance current for the
eighth cell from the bottom of the stack
7 NC — — This pin is not connected to silicon.
8 VC6 I IA
Sense voltage input pin for the sixth cell from the bottom of the stack, balance current input
for the sixth cell from the bottom of the stack, and return balance current for the seventh
cell from the bottom of the stack
9 NC — — This pin is not connected to silicon.
10 VC5 I IA
Sense voltage input pin for the fifth cell from the bottom of the stack, balance current input
for the fifth cell from the bottom of the stack, and return balance current for the sixth cell
from the bottom of the stack
11 NC — — This pin is not connected to silicon.
12 VC4 I IA
Sense voltage input pin for the fourth cell from the bottom of the stack, balance current
input for the fourth cell from the bottom of the stack, and return balance current for the fifth
cell from the bottom of the stack
13 VC3 I IA
Sense voltage input pin for the third cell from the bottom of the stack, balance current input
for the third cell from the bottom of the stack, and return balance current for the fourth cell
from the bottom of the stack
14 VC2 I IA
Sense voltage input pin for the second cell from the bottom of the stack, balance current
input for the second cell from the bottom of the stack, and return balance current for the
third cell from the bottom of the stack
15 VC1 I IA
Sense voltage input pin for the first cell from the bottom of the stack, balance current input
for the first cell from the bottom of the stack, and return balance current for the second cell
from the bottom of the stack
16 VC0 I IA
Sense voltage input pin for negative terminal of the first cell from the bottom of the stack,
and return balance current for first cell from the bottom of the stack
17 VSS — P Device ground
18 SRP I IA
Analog input pin connected to the internal coulomb counter peripheral for integrating a
small voltage between SRP and SRN, where SRP is the top of the sense resistor. A
charging current generates a positive voltage at SRP relative to SRN.
19 NC — — This pin is not connected to silicon.
20 SRN I IA
Analog input pin connected to the internal coulomb counter peripheral for integrating a
small voltage between SRP and SRN, where SRN is the bottom of the sense resistor. A
charging current generates a positive voltage at SRP relative to SRN.
21 TS1 I/O OD, I/OA Thermistor input, or general purpose ADC input
22 TS2 I/O OD, I/OA
Thermistor input and functions as wakeup from SHUTDOWN, or general purpose ADC
input
23 TS3 I/O OD, I/OA Thermistor input, or general purpose ADC input
24 REG18 O P Internal 1.8 V-LDO output (only for internal use)
25 ALERT I/O I/OD, I/OA
Multifunction pin, can be ALERT output, or HDQ I/O, or thermistor input, or general
purpose ADC input, or general purpose digital output
26 SCL I/O I/OD Multifunction pin, can be SCL or SPI_SCLK
27 SDA I/O I/OD Multifunction pin, can be SDA or SPI_MISO
28 HDQ I/O I/OD, I/OA
Multifunction pin, can be HDQ I/O, or SPI_MOSI, or thermistor input, or general purpose
ADC input, or general purpose digital output
29 CFETOFF I/O I/OD, I/OA
Multifunction pin, can be CFETOFF, or SPI_CS, or thermistor input, or general purpose
ADC input, or general purpose digital output
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BQ76942
SLUSE14B – DECEMBER 2020 – REVISED DECEMBER 2021
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