Texas Instruments BQ76942, Руководство пользователя

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Typical values stated where T
A
= 25°C and V
BAT
= 55.0 V, min/max values stated where T
A
= -40°C to 85°C and V
BAT
= 4.7 V
to 55 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
(OC_ACC)
Overcurrent (OCC, OCD1, OCD2)
detection voltage threshold
accuracy
(3)
|Setting| < 20 mV –2 2.65 mV
|Setting| = 20 mV ~ 56 mV –4 4 mV
|Setting| = 56 mV ~ 100 mV –5 5 mV
|Setting| > 100 mV –7 5 mV
V
(OC_DLY)
Overcurrent (OCC, OCD1, OCD2)
detection delay (independent delay
setting for each protection)
Nominal setting (3.3 ms steps)
10 ms to
425 ms
in 3.3 ms
steps
ms
(1) Measured by fault triggered using 100 ms detection delay.
(2) Cell balancing not active. Timing of overvoltage and undervoltage protection checks is modified when cell balancing is in progress.
(3) Specified by a combination of characterization and production test
7.27 Timing Requirements – I
2
C Interface, 100kHz Mode
Typical values stated where T
A
= 25°C and V
BAT
= 55.0 V, min/max values stated where T
A
= -40°C to 85°C and V
BAT
= 4.7 V
to 55 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
f
SCL
Clock operating frequency
(1)
SCL duty cycle = 50% 100 kHz
t
HD:STA
START condition hold time
(1)
4.0 µs
t
LOW
Low period of the SCL clock
(1)
4.7 µs
t
HIGH
High period of the SCL clock
(1)
4.0 µs
t
SU:STA
Setup repeated START
(1)
4.7 µs
t
HD:DAT
Data hold time (SDA input)
(1)
0 ns
t
SU:DAT
Data setup time (SDA input)
(1)
250 ns
t
r
Clock rise time
(1)
10% to 90% 1000 ns
t
f
Clock fall time
(1)
90% to 10% 300 ns
t
SU:STO
Setup time STOP condition
(1)
4.0 µs
t
BUF
Bus free time STOP to START
(1)
4.7 µs
t
RST
I
2
C bus reset
(1)
Bus interface is reset if SCL is detected
low for this duration
1.9 2.1 s
R
PULLUP
Pullup resistor
(2)
Pullup voltage rail ≤ 5 V 1.5 kΩ
(1) Specified by design
(2) Specified by characterization
7.28 Timing Requirements – I
2
C Interface, 400kHz Mode
Typical values stated where T
A
= 25°C and V
BAT
= 55.0 V, min/max values stated where T
A
= -40°C to 85°C and V
BAT
= 4.7 V
to 55 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
f
SCL
Clock operating frequency
(1)
SCL duty cycle = 50% 400 kHz
t
HD:STA
START condition hold time
(1)
0.6 µs
t
LOW
Low period of the SCL clock
(1)
1.3 µs
t
HIGH
High period of the SCL clock
(1)
600 ns
t
SU:STA
Setup repeated START
(1)
600 ns
t
HD:DAT
Data hold time (SDA input)
(1)
0 ns
t
SU:DAT
Data setup time (SDA input)
(1)
100 ns
t
r
Clock rise time
(1)
10% to 90% 300 ns
t
f
Clock fall time
(1)
90% to 10% 300 ns
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BQ76942
SLUSE14B – DECEMBER 2020 – REVISED DECEMBER 2021
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