§
162
NŸ
§
18
NŸ
REG18 (
§
1.8V)
Voltage
ADC
C
F
ET
O
F
F
Pi
n
T
S
input
reference
D
F
ET
O
F
F
Pi
n
T
S
AL
ER
T
Pi
n
T
S
T
S
1
Pi
n
T
S
T
S
2
Pi
n
T
S
T
S
3
Pi
n
T
S
H
D
Q
Pi
n
T
S
D
C
H
G
Pi
n
T
S
D
D
SG
Pi
n
T
S
§
5
0
0
Ÿ
§
5
0
0
Ÿ
§
5
0
0
Ÿ
§
5
0
0
Ÿ
§
5
0
0
Ÿ
§
5
0
0
Ÿ
§
5
0
0
Ÿ
§
5
0
0
Ÿ
§
5
0
0
Ÿ
VREF1
Figure 10-3. External Thermistor Biasing
To provide a high precision temperature result, the device uses the same 1.8 V LDO voltage for the ADC
reference as is used for biasing the thermistor pullup resistor, thereby implementing a ratiometric measurement
that removes the error contribution from the LDO voltage level. The device processes the digitized thermistor
voltage to calculate the temperature based on multiorder polynomials, which can be programmed by the user
based on the specific thermistor selected.
10.7 Factory Trim of Voltage ADC
The BQ76942 device includes factory trim for the cell voltage ADC measurements in order to optimize the
voltage measurement performance even if no further calibration is performed by the customer. Calibration can
be performed by the customer on the production line to further optimize the performance in the system. The
trim information is used to correct the raw ADC readings before they are reported as 16-bit voltage values. The
32-bit ADC voltage data, which is generated in units of ADC counts, is modified before reporting by subtracting
a stored offset trim value. The resulting reported data does not include any further correction (such as for gain),
therefore the customer will need to process them before use.
The device includes a factory gain trim for the voltage measurements performed using the general purpose ADC
input capability on the multifunction pins as well as the TS1, TS2, and TS3 pins. It also includes factory gain trim
on the voltage measurements of the PACK pin, the LD pin, and the top-of-stack (VC10) pin.
10.8 Voltage Calibration (ADC Measurements)
The BQ76942 device includes optional capability for the customer to calibrate each cell voltage gain and
the gain for the stack voltage, the PACK pin voltage, and the LD pin voltage individually, and multifunction
pin general ADC measurements. An offset calibration value
Calibration:Vcell Offset:Vcell Offset
is included
for use with the cell voltage measurements, and
Calibration:Vdiv Offset:Vdiv Offset
is used with the TOS
(stack), PACK, and LD voltage measurements. The cell voltage gains determined during calibration are written
in
Calibration:Voltage:Cell 1 Gain – Cell 10 Gain
, where
Cell 1 Gain
is used for the measurement of VC1-
VC0,
Cell 2 Gain
is used for the measurement of VC2-VC1, and so forth. Similarly, the calibration voltage
gain for the TOS voltage should be written in
Calibration:Voltage:TOS Gain
, the PACK pin voltage gain in
Calibration:Voltage:Pack Gain
, the LD pin voltage gain in
Calibration:Voltage:LD Gain
, and multifunction pin
general purpose ADCIN measurement gain in
Calibration:Voltage:ADC Gain
.
SLUSE14B – DECEMBER 2020 – REVISED DECEMBER 2021
38
Copyright © 2021 Texas Instruments Incorporated
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