Table 16-3. Terminating Unused Pins
Pin
Name
Recommendation
1–16, 48
VC0–VC14
Cell inputs 1, 2, and 14 should always be connected to actual cells, with cells connected between VC1 and VC0,
VC2 and VC1, and VC14 and VC13A. VC0 should be connected through a resistor and capacitor on the pcb to
pin 17 (VSS). Pins related to unused cells (which may be cell 3–cell 13) can be connected to the cell stack to
measure interconnect resistance or provide a Kelvin-connection to actual cells, in which case they should
include a series resistor and parallel capacitor, in similar fashion to pins connected to actual cells (see
VC Pins for Cells Versus Interconnect
). Another option is to short unused VC pins directly to an adjacent VC pin.
All VC pins should be connected to either an adjacent VC pin, an actual cell (through R and C) or stack
interconnect resistance (through R and C).
18, 20
SRP, SRN
If not used, these pins should be connected to pin 17 (VSS).
19, 44
NC
These pins are not connected to silicon. They can be left floating or connected to an adjacent pin or connected
to VSS.
21, 23,
25, 28,
29, 30,
31, 32
TS1, TS3,
ALERT, HDQ,
CFETOFF,
DFETOFF,
DCHG, DDSG
If not used, these pins can be left floating or connected to pin 17 (VSS). Any of these pins (except for TS1 and
TS3) may be configured with the internal weak pulldown resistance enabled during operation, although this is
not necessary.
22
TS2
If the device is intended to enter SHUTDOWN mode, the TS2 pin should be left floating. If SHUTDOWN mode
will not be used in the application, and the TS2 pin will not be used for a thermistor or ADCIN measurement, the
TS2 pin can be left floating or connected to pin 17 (VSS).
33
RST_SHUT
If not used, this pin should be connected to pin 17 (VSS).
34, 35
REG1, REG2 If not used, these pins can be left floating or connected to pin 17 (VSS).
36
REGIN
If not used, this pin should be connected to pin 17 (VSS).
37
BREG
If this pin is not used and pin 36 (REGIN) is also not used, both pins should be connected to pin 17 (VSS). If this
pin is not used but pin 36 is used (such as driven from an external source), then this pin should be connected to
pin 36 (REGIN).
38
FUSE
If not used, this pin can be left floating or connected to pin 17 (VSS).
39
PDSG
If not used, this pin should be left floating.
40
PCHG
If not used, this pin should be left floating.
41
LD
If the DSG driver will not be used, this pin can be connected through a series resistor to the PACK+ connector,
or can be connected to pin 17 (VSS).
43
DSG
If not used, this pin should be left floating.
45
CHG
If not used, this pin should be left floating.
46
CP1
If not used, this pin should be connected to pin 47 (BAT).
Note
If the charge pump is enabled with CP1 connected to BAT, the device will consume an additional
≈200 µA.
17 Power Supply Requirements
The BQ769142 device draws its supply current from the BAT pin, which is typically connected to the top of stack
point through a series diode, to protect against any fault within the device resulting in unintended charging of the
pack. A series resistor and capacitor is included to lowpass filter fast variations on the stack voltage. During a
short circuit event, the stack voltage may be momentarily pulled to a very low voltage before the protection FETs
are disabled. In this case, the charge on the BAT pin capacitor will temporarily support the BQ769142 device's
supply current, to avoid the device losing power.
18 Layout
18.1 Layout Guidelines
• The quality of the Kelvin connections at the sense resistor is critical. The sense resistor must have a
temperature coefficient no greater than 50 ppm in order to minimize current measurement drift with
temperature. Choose the value of the sense resistor to correspond to the available overcurrent and short-
circuit ranges of the BQ769142 device. Parallel resistors can be used as long as good Kelvin sensing is
ensured. The device is designed to support a 1-mΩ sense resistor.
SLUSE91A – SEPTEMBER 2020 – REVISED FEBRUARY 2021
72
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