Table 6-1. BQ769142 TQFP Package (PFB) Pin Functions (continued)
PIN
I/O
TYPE
DESCRIPTION
NO.
NAME
31
DCHG
I/O
OD, I/OA
Multifunction pin, can be DCHG, thermistor input, general purpose ADC input, or
general purpose digital output
32
DDSG
I/O
OD, I/OA
Multifunction pin, can be DDSG, thermistor input, general purpose ADC input, or
general purpose digital output
33
RST_SHUT
I
ID
Digital input pin for reset or shutdown
34
REG2
O
P
Second LDO (REG2) output, which can be programmed for 1.8 V, 2.5 V, 3.0 V, 3.3 V,
or 5.0 V
35
REG1
O
P
First LDO (REG1) output, which can be programmed for 1.8 V, 2.5 V, 3.0 V, 3.3 V, or
5.0 V
36
REGIN
I
IA
Input pin for REG1 and REG2 LDOs
37
BREG
O
OA
Base control signal for external preregulator transistor
38
FUSE
I/O
I/OA
Fuse sense and drive
39
PDSG
O
OA
Predischarge PFET control
40
PCHG
O
OA
Precharge PFET control
41
LD
I/O
I/OA
Load detect pin
42
PACK
I
IA
Pack sense input pin
43
DSG
O
OA
NMOS Discharge FET drive output pin
44
NC
—
—
This pin is not connected to silicon.
45
CHG
O
OA
NMOS Charge FET drive output pin
46
CP1
I/O
I/OA
Charge pump capacitor
47
BAT
I
P
Primary power supply input pin
48
VC14
I
IA
Sense voltage input pin for the fourteenth cell from the bottom of the stack, balance
current input for the fourteenth cell from the bottom of the stack, and top-of-stack
measurement point
P = Power Connection, O = Digital Output, AI = Analog Input, I = Digital Input, I/OD = Digital Input/Output
SLUSE91A – SEPTEMBER 2020 – REVISED FEBRUARY 2021
6
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