43
ADS7950, ADS7951, ADS7952, ADS7953, ADS7954, ADS7955
ADS7956, ADS7957, ADS7958, ADS7959, ADS7960, ADS7961
SLAS605C – JUNE 2008 – REVISED JULY 2018
Product Folder Links:
ADS7950 ADS7951 ADS7952 ADS7953 ADS7954 ADS7955 ADS7956 ADS7957 ADS7958
Copyright © 2008–2018, Texas Instruments Incorporated
Table 11. GPIO Program Register Settings
BITS
RESET
STATE
LOGIC
STATE
FUNCTION
DI15-12
NA
0100
Device selects GPIO Program Registers for programming.
DI11-10
00
00
Do not program these bits to any logic state other than ‘00’
DI09
0
1
Device resets all registers in the next CS frame to the reset state shown in the corresponding tables (it
also resets itself).
0
Device normal operation
DI08
0
1
Device configures GPIO3 as the device power-down input.
0
GPIO3 remains general purpose I or O. Program 0 for QFN packaged devices.
DI07
0
1
Device configures GPIO2 as device range input.
0
GPIO2 remains general purpose I or O. Program 0 for QFN packaged devices.
DI06-04
000
000
GPIO1 and GPIO0 remain general purpose I or O. Valid setting for QFN packaged devices.
xx1
Device configures GPIO0 as ‘high or low’ alarm output. This is an active high output. GPIO1 remains
general purpose I or O. Valid setting for QFN packaged devices.
010
Device configures GPIO0 as high alarm output. This is an active high output. GPIO1 remains general
purpose I or O. Valid setting for QFN packaged devices.
100
Device configures GPIO1 as low alarm output. This is an active high output. GPIO0 remains general
purpose I or O. Setting not allowed for QFN packaged devices.
110
Device configures GPIO1 as low alarm output and GPIO0 as a high alarm output. These are active high
outputs. Setting not allowed for QFN packaged devices.
Note: The following settings are valid for GPIO which are not assigned a specific function through bits DI08..04
DI03
0
1
GPIO3 pin is configured as general purpose output. Program 1 for QFN packaged devices.
0
GPIO3 pin is configured as general purpose input. Setting not allowed for QFN packaged devices.
DI02
0
1
GPIO2 pin is configured as general purpose output. Program 1 for QFN packaged devices.
0
GPIO2 pin is configured as general purpose input. Setting not allowed for QFN packaged devices.
DI01
0
1
GPIO1 pin is configured as general purpose output. Program 1 for QFN packaged devices.
0
GPIO1 pin is configured as general purpose input. Setting not allowed for QFN packaged devices.
DI00
0
1
GPIO0 pin is configured as general purpose output. Valid setting for QFN packaged devices.
0
GPIO0 pin is configured as general purpose input. Valid setting for QFN packaged devices.
8.5.3 Alarm Thresholds for GPIO Pins
Each channel has two alarm program registers, one for setting the high alarm threshold and the other for setting
the low alarm threshold. For ease of programming, two alarm programming registers per channel, corresponding
to four consecutive channels, are assembled into one group (a total eight registers). There are four such groups
for 16 channel devices and 3/2/1 such groups for 12/8/4 channel devices respectively. The grouping of the
various channels for each device in the ADS79xx family is listed in
. The details regarding programming
the alarm thresholds are illustrated in the flowchart in
.
lists the details regarding the Alarm
Program Register settings.
Table 12. Grouping of Alarm Program Registers
GROUP NO.
REGISTERS
APPLICABLE FOR DEVICE
0
High and low alarm for channel 0, 1, 2, and 3
ADS7953..50, ADS7957..54, ADS7961..58
1
High and low alarm for channel 4, 5, 6, and 7
ADS7953..51, ADS7957..55, ADS7961..59
2
High and low alarm for channel 8, 9, 10, and 11
ADS7953 and 52, ADS7957 and 56, ADS7961 and 60
3
High and low alarm for channel 12, 13, 14, and 15
ADS7953, ADS7957, ADS7961
Each alarm group requires 9 CS frames for programming their respective alarm thresholds. In the first frame the
device enters the programming sequence and in each subsequent frame it programs one of the registers from
the group. The device offers a feature to program less than eight registers in one programming sequence. The
device exits the alarm threshold programming sequence in the next frame after it encounters the first ‘Exit Alarm
Program’ bit high.
