SE868Kx-Ax Family Product User Guide
1VV0301201 Rev. 5
Page 52 of 83
2021-07-15
Not Subject to NDA
UART TX logic levels are shown in Table 30: Output Logic Levels: TX and 1PPS.
UART RX logic levels are shown in Table 28: Input Logic Levels: RX and Reset-N.
Warning: Note that the RX pins have a maximum input voltage of 3.4
V (which is lower than the maximum for Vcc or Vbatt).
Warning: Care must be used to prevent backdriving the RX lines when
the module is powered down or in a low-power state.
9.7.4.
I2C Port Operation (MT3333-based modules only)
MT3337-based modules do not support I2C interface.
MT3333-based modules 2
nd
serial port (port 1) is configured to use the I2C interface by
default but can be changed to UART or SPI via command: $PMTK258
The I
2
C_Clock and I
2
C_Data lines require external pullups (example value: 10 K
Ω
).
Features -
•
Slave mode only (hard-coded address = 0x10)
•
Fast mode (up to 400 Kbps)
•
7-bit address
•
255-byte buffer
•
The module operates in the polled mode (with the host as the master)
•
Data Ready Indicator
Transmit -
The host must be able to read several packets each report cycle. A minimum pause of 2
ms is required between reads to allow the module to fill the buffer. A longer delay is
permissible. For example, if the report cycle is 1 second, set the polling sleep time to 500
ms for the next output interval to start.
The buffer will contain up to 254 data bytes plus an <LF> (x’0A”) character.
Each NMEA sentence will be terminated by the (standard) <CR-
LF> (x’0D, x’0A’)
characters, and a NMEA sentence can span buffers.
If necessary, the buffer is padded with x’0A’ characters. x’0A’ is also used for idle
characters.
