Theory of Operation
1710J-Series Waveform Monitors
5–9
The combination of Q382 and Q383 forms a shunt-feedback amplifier. Q382
amplifies and inverts the collector current flowing in Q383 to provide most of
the signal current through R485. Because the current across Q382 is nearly
constant the input-signal voltage is applied directly across its emitter resistor,
R485, with very little distortion. Negative feedback is employed to improve
linearity and reduce the thermal distortions introduced by Q383. In addition,
negative feedback increases the input impedance. A series compensation network
consisting of R384 and C384 provides improved bandwidth and stability.
The combination of Q385 and Q387 form a shunt-feedback amplifier, identical
to Q383 and Q382. The signal current for this amplifier is input through R485.
Signal current through Q387 is equal in value and opposite in phase to the
current change in Q382. The Limit Center, R489, balances the bias current
flowing in Q382 and Q387. R387 and C387 form another series compensation to
improve bandwidth and stability. R486 and C389 provide high-frequency
peaking to improve the flat response; R385 and C385 improve low-frequency
transient response.
Q280 and Q289 are common-base stages that couple the complementary signal
currents to the non-inductive CRT load resistors, R184 and R186. The resulting
signal voltages drive the CRT vertical deflection plates. R183 and R187 shunt
the load resistors to provide the proper load resistance for the high-bandwidth
output signal. L180 and L190 are adjustable shunt-peaking coils to increase the
vertical bandwidth and allow precise adjustment of flat response.
Timing, Diagram 3
Composite sync from the sync separator (Diagram 1) is used to time the
horizontal and vertical sync generators. Outputs from these generators are used
to develop line and field rate signals that are used to display selected lines or
fields of information. The clamp pulses used to time the vertical amplifier DC
Restorers are generated by a back porch generator driven by the horizontal sync
generator.
The input staircase for the RGB/YRGB parade display is input to an operational
amplifier through the rear-panel REMOTE connector. The compensatable (dc
level and transient response) RGB amplifier is enabled (RGB ENABLE) by a
TTL low.
The timing state machine is U735. It, in conjunction with the microcontroller
outputs control signals for input switching, calibrator drive, and the filter
switching on Diagram 1. In addition, it provides the clamp control pulses, sweep
triggers, and miscellaneous signals used by the microcontroller.
U735 is a quad 20-input logic array. It outputs a sync signal from pin 21 that
triggers the horizontal sync generator, which in turn outputs a regenerated
Vertical Output Amplifier
Timing State Machine
Содержание 1710J Series
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