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orkstation 5037A-IL User's Manual
Legacy Wake-On-LAN (JSTBY)
The legacy Wake-On-LAN header is
located at JWOL on the motherboard.
See the table on the right for pin defi
-
nitions. (This feature is provided for
legacy I/O expansion cards.)
Wake-On-LAN
Pin Definitions
(JWOL)
Pin# Definition
1
+5V Standby
2
Ground
3
Wake-up
SPDIF IN / SPDIF OUT (JSPDIF_IN/
JSPDIF_OUT)
The SP/DIF In (JSPDIF_IN) and SP/
DIF Out (JSPDIF_OUT) are used
for digital audio. You will also need
the appropriate cables to use these
features.
SPDIF_In
Pin Definitions
Pin# Definition
1
S/PDIF_In
2
Ground
SPDIF_Out
Pin Definitions
Pin# Definition
1
S/PDIF_Out
2
Ground
TPM Header (JTPM1)
A Trusted Platform Module/Port 80
header is located at JTPM1 to provide
TPM support and Port 80 connection.
Use this header to enhance system
performance and data security. See
the table on the right for pin defini
-
tions.
TPM/Port 80 Header
Pin Definitions
Pin # Definition
Pin # Definition
1
LCLK
2
GND
3
LFRAME#
4
<(KEY)>
5
LRESET#
6
+5V (X)
7
LAD 3
8
LAD 2
9
+3.3V
10
LAD1
11
LAD0
12
GND
13
SMB_CLK4
14
SMB_DAT4
15
+3V_DUAL
16
SERIRQ
17
GND
18
CLKRUN# (X)
19
LPCPD#
20
LDRQ# (X)
Serial_Link-SGPIO
Pin Definitions
Pin# Definition
Pin Definition
1
NC
2
NC
3
Ground
4
DATA Out
5
Load
6
Ground
7
Clock
8
NC
T-SGPIO Headers (T-SGPIO1/2)
The T-SGPIO1 and T-SGPIO2 (Serial-
Link General Purpose Input/Output)
headers are located near the SATA
connectors on the motherboard. These
headers are used to communicate with
the enclosure management chip in the
system. See the table on the right for
pin definitions. Refer to the board layout
below for the locations of the headers.
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Страница 120: ...C 3 Appendix C System Specifications Notes...