Chapter 2: Installation
2-29
Fan2
24-Pin PW2
IDE1
IDE2
Fan6
Fan5
Fan4
Debug Codes LED
S C S I B
U S B 2 / 3
S P K R
C h a s s i s
Intrusion
C L R
CMOS
IPMI
S M B
L S I
S C S I
Controller
P 6 4 H
ICH4
( S o u t h
Bridge)
Front P
C T L R
AN
ble
Speaker
S C S I
Enable
G L A N
C T L R
S I/O
BIOS1
BIOS2
BIOS3
B I O S 4 B I O S 5 BIOS6
Battery
COM2
S C S I
L E D
IPMI
J26 is designated as the IPMI
Socket for the i2DML-8G2/i2DML-
iG2 Motherboard.
IDE Connectors
T h e r e a r e n o j u m p e r s t o
configure the onboard IDE#1
and #2 connectors (at J37
and J35, respectively). See
the table on the right for pin
definitions.
Pin Number
Function
1
Reset IDE
3
Host Data 7
5
Host Data 6
7
Host Data 5
9
Host Data 4
11
Host Data 3
13
Host Data 2
15
Host Data 1
17
Host Data 0
19
GND
21
DRQ3
23
I/O W rite-
25
I/O Read-
27
IOCHRDY
29
DACK3-
31
IRQ14
33
Addr 1
35
Addr 0
37
Chip Select 0
39
Activity
Pin Number
Function
2
GND
4
Host Data 8
6
Host Data 9
8
Host Data 10
10
Host Data 11
12
Host Data 12
14
Host Data 13
16
Host Data 14
18
Host Data 15
20
Key
22
GND
24
GND
26
GND
28
BALE
30
GND
32
IOCS16-
34
GND
36
Addr 2
38
Chip Select 1-
40
GND
IDE Connector Pin Definitions
(J35, J37)
24Pin PW1
1
5
2
6
CO
M
1
3
3
7
7
4
4
8
8
LAN1
LAN
2
VGA
S C S I B
U S B 2 / 3
C H
IPMI
S M B
C P U 1
CPU2
F
a
n
2
2
4
-P
in
P
W
2
2
4
P
in
P
W
2
ID
E
1
ID
E
2
Fan6
Fan5
5
Fan6
Fan1
S M B
P W
A l a r m
R e s e t
DIMM1
DIMM2
DIMM5
DIMM6
DIMM3
DIMM7
DIMM4
DIMM8
MRH-D
MRH-D
MRH-D
MRH-D
PCI-X
SCSI A
L S I
S C S I
Controller
P 6 4 H
ICH4
SIOH
S N C
VRM-top
VRM-top
FP C T L R
R
US
B
0/1
F
a
n
7
GLAN
C T L R
Fan8
S I/O
S
Fa
n
4
Fan4
Fan3
3
3
P W R
Fault
COM2
6
2
5
DIMM5
1
IDE 1 (Right),
IDE 2 (Left)
IPMI
