Chapter 2: Installation
2-19
U S B 2 / 3
S P K R
C h a s s i s
Intrusion
C L R
CMOS
Fan6
Fan5
Bridge)
Front Panel
C T L R
OS1
M2
De
LAN1
LAN2
VGA
MRH-D
PC
GLAN
Enable
S C S I
USB0/1
G L A N
C T L R
Chassis Intrusion
A Chassis Intrusion header (J25)
is located below the S I/O chip.
Attach the appropriate cable to in-
form you of a chassis intrusion.
See the tables on the right for pin
definitions.
GLAN Ports (Ethernet
Ports)
Two Gigabit Ethernet ports (desig-
nated LAN1, LAN2) are located
b e t w e e n K e y b o a r d / M o u s e c o n -
nectors and the VGA connector.
T h i s p o r t a c c e p t s R J 4 5 t y p e
cables.
Pin
Number
1
2
Definition
Instrusion
Ground
Chassis Intrusion
Pin Definitions
(J25)
24Pin PW1
1
5
2
6
CO
M
1
3
3
7
7
4
4
8
8
LAN1
LAN
2
VGA
S C S I B
U S B 2 / 3
C H
IPMI
S M B
C P U 1
CPU2
F
an
2
2
4
-P
in
P
W
2
2
4
P
in
P
W
2
ID
E
1
ID
E
2
Fan6
Fan5
5
Fan6
Fan1
S M B
P W
A l a r m
R e s e t
DIMM1
DIMM2
DIMM5
DIMM6
DIMM3
DIMM7
DIMM4
DIMM8
MRH-D
MRH-D
MRH-D
MRH-D
PCI-X
SCSI A
L S I
S C S I
Controller
P 6 4 H
ICH4
SIOH
S N C
VRM-top
VRM-top
FP C T L R
R
US
B
0/1
F
a
n
7
GLAN
C T L R
Fan8
S I/O
S
Fa
n
4
Fan4
Fan3
3
3
P W R
Fault
COM2
6
2
5
DIMM5
1
GLAN1, GLAN2
Chassis Intrusion
