Sun Microsystems 5500, Справочное руководство

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6-2 Sun Enterprise 6500/5500/4500 Systems Reference Manual • April 1998
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Hold the board only by the edges near the middle of the board, where the board
stiffener is located. Do not hold the board only at the ends.
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When removing the board from an antistatic bag, keep the board vertical until
you lay it on the Sun ESD mat.
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Do not place the board on a hard surface. Use a cushioned antistatic mat. The
board connectors and components have very thin pins that bend easily.
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Do not use an oscilloscope probe on the components. The soldered pins are easily
damaged or shorted by the probe point.
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Transport the board in an antistatic bag.
■
Be careful not to drag boards across surfaces as board components are easily
damaged.
6.2 Clock+ Board
There is one clock+ board to a system. The clock+ board provides:
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Programmable system and processor clock
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Serial, keyboard, and mouse ports for the console
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Centralized Time-of-day (TOD) chip that includes NVRAM
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Centralized reset logic
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Status and control of power supplies
The clock+ board consists of the following subsystems:
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Console Bus
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Clocks
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Reset logic
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JTAG
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Centerplane connector signals
FIGURE 6-1
depicts a block diagram of the subsystems and centerplane connector.