DocID13284 Rev 2
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UM0404
CAN modules
Again calling t
BT
the CAN Bit Time, the maximum time t
S
(with correct sampling) between
two re-synchronization edges can be expressed as:
where t
PB2
corresponds to the duration of Phase_Seg2 (PB = Phase Buffer).
Also in this case, assuming the two CAN nodes with opposite system clock generator
tolerance (considering the specified tolerance "df" valid for both the nodes in the network)
for their respective system clocks, the accumulated phase error at the re-synchronization
instant becomes:
For a correct sampling, the accumulated phase error must not lead the re-synchronization
edge outside the interval Phas Phase_Seg2. This condition can be expressed as:
Once again, this expression can be translated in a condition for the CAN system clock
tolerance df:
In conclusion, there are two conditions on CAN system clock tolerance both to be satisfied.
In case the CAN node generates its system clock through a PLL, the maximum allowed
clock tolerance must be a function of the PLL jitter also: this will result in a more severe
quality requirement for the oscillator (crystal or resonator).
The phase error introduced by the PLL jitter is a function of the number of clock periods: in
particular the jitter increases with the clock period number till a saturation maximum value,
which consists in the long term jitter. Refer to datasheet for more details about the PLL
Electrical Characteristics.
Considering the PLL effect, the two expressions giving the phase error in the two conditions
of introduced above, are modified as in the following:
where
δ
PLL
represents the absolute deviation introduced by the PLL jitter. In the two
formulas the value of
δ
PLL
should be evaluated for different number of clock periods: for the
first, the jitter correspondent to 10 bit time period must be considered, while for the second,
the jitter correspondent to 13 bit time period must be considered. The number of clock
periods should be computed taking into account the baudrate prescaler setting as well.
Again, the factor 2, which multiplies the single CAN node phase deviation, is considered to
take into account the worst case eventuality that the two communicating nodes are at the
opposite limits of the specified frequency tolerance.
t
S
13
t
BT
t
PB2
–
⋅
=
Δ
t
S
2
df
⋅
(
)
13
t
BT
t
PB2
–
⋅
(
)
⋅
=
t
PB1
2
df
⋅
(
)
13
t
BT
t
Seg2
–
⋅
(
)
t
PB2
<
⋅
<
d f
min t
PB1
t
PB2
(
,
)
2
13
t
BT
t
PB2
–
⋅
(
)
⋅
-----------------------------------------------
<
Δ
t
J
2
d
(
f
⋅
10
t
BT
δ
PLL
)
+
⋅
⋅
=
Δ
t
S
2
d
[
f
⋅
13
t
BT
t
PB2
–
⋅
(
) δ
PLL
]
+
⋅
=