Spectravideo MKI, Сервисное – Техническое руководство

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PIN DESCRIPTIONS
BUSACK
BUSREQ
HALT
!NT
I ORQ
Add re s s Bus ( ou tp u t ,
ac t ive H igh , 3
-
s
t
a t
e
) .
A0- A15 form a
1 6 -b i t a ddre s s bus . The A dd r e s s Bus p ro v i d e s
t he
a dd r e s s for
memo ry data bus exchange s ( up to
64K
b
y t e
s
) and for 1 / 0 device
exchanges .
Bus Acknow l e dge ( ou tp u t ,
ac t iv e
Low ) . Bus Acknow l edge
ind i c a t e s to t he re que s t ing
de v i ce t h a t the CPU
a d d r e s s bus ,
data bus , and con t r o l s i g na l s
MREQ , I ORQ ,
and WR have
e nt e re d the i r h i gh- impe dance
s t
a
t
e
s
.
The
e x
t
e
r
n
a
l
c i r cu i t ry
can now cont r o l the s e l i ne s .
Bus Re que s t
ac t ive Low ) . Bus Reques t
ha s
a h ighe r
p r i or i t y than NMI and is
recogn i z e d a t the end of the
current mach i ne cyc l e . BUSREQ f orces t he CPU a dd r e s s bus ,
data bus , and co ntro l s i gna l s
MREQ ,
I ORQ , RD , and WR to go
to a h i gh- impe dance s t a t e so th a t other dev i c e s can con t r o l
t he se l ines .
BUSREQ i s norma l ly w i re-ORed and r e qu i re s an
. externa l pu l l up for the s e app 1 i c a t ion s . Extended BU SREQ
per iods due to e x tens i ve DMA ope r a t i ons can p r event the CPU
f rom p rope r ly re f re s h ing dy nam ic RAM s .
Da ta Bus ( input / ou tpu t , ac t i ve H i gh , 3 - s t a t e ) .
D� -
D 7
cons t i t u t e an 8-b i t b id i re c t i ona l data bus , use d for data
exchanges w i th memory and I / O .
H a l t S t a te ( ou t p u t , a c t i ve Low ) . HALT ind i c a t e s that the CPU
has exec u t e d a Ha l t in s t r uc t i o n and is awa i t ing e i t he r a non­
maskab l e or a maskab l e i n t e r rupt ( w i th t he mask e nab l ed ) be fore
ope rat ion can re s ume . Wh i l e ha l t e d , the CPU execu t e s NOP t o
ma inta in memory re f re sh .
In t e rrup t Reques t ( inpu t , ac t ive Low) . In t e r rupt Requ e s t i s
gene rated b y I / 0 dev ices . The CPU honors a requ e s t at the
end of the current inst ruc t ion if the i n t e rn a l sof tware­
cont ro l le d inte rrupt enab l e f l ip- f lop ( I FF ) is e nab l e d .
!NT
is norma l ly wire-ORed and re qu i r e s an e x t e rnal pu l l up for the s e
app l ic a t ions .
Inpu t /Ou t put Re que s t ( ou t pu t , a c t i ve ·Low , 3 - s t a te ) . I ORQ
indicat e s that t he lower ha l f o f t he a ddre s s bus h o l d s a va l i d
1 / 0 add re s s fo r a n I /O rea d o r w r i t e op e ra t ion .
IORQ i s a l so
gene ra te d concu rrent ly w i th M l du r idng an i n t errupt acknowl edge
cyc l e to ind i ca t e that an i n t e r r up t re sponse vec t o r can be
p lace d on t he da ta b us .
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