Spectravideo MKI, Сервисное – Техническое руководство

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T.·1S-99 l8A
VDP T e rm in a l
A s s
s
S i g n a t u re
C CO-CD7
� !O D
E
C S R
c sw
RDO R D 7
AD0-AD7
R
A
S
CAS
R
/
w
XTAL1 ,
XTAL2
G ROMCLK
RES ET/SYNC
D
e
s
c :-
i o t
.
i
o n
CPU
da ta b us
( COO )
i s t h e mo s t s ig n i f i c a n t b i t
C P U i n t e r f a c e mode
s e l e c t ;
u s u a l l y a p ro c e s s o r a dd r e s s
l i ne . M o d e d e t e rm i n e s
th e sou rce
o r d e s t i na t i o n o f
a
re a d o r w r i t e da t a t r a n s f e r . Mode
i s
no rma l l y t
i e
d to
a
CPU
l o w o r de r add ce s s re a d .
CPU-VDP re a d s t robe .
C S R
i s
t h e
CPU-f rom-VDP r e a d
s e l e c t .
When
i t i s
a c t i ve ( l o w ) t h e
VDP
o u
t
p u t s 8 b i t s
on D0-0 7
t o th e CPU .
CPU-VDP w r i t e s t r o b e . CSW i s the CPU- f rom-VDP w r i t e
s e l e c t . When
i t
i s
a c t i ve ( l o w ) ,
t h e
8 b i t s
on
D0-07
a r e
s t r o b e d i nt o the VDP .
+ 5 vo l t s up p
ly
G
r
o u
n
d Re
f
e r e
n c e
VRAN re a d d a t a b u s ( RDO i s the mo s t s
i g
n i f i
c
a
n t
b i t
)
VRAM a dd re s s / d a t a b u s ( m u l t i p l ex e d h i gh and l ow order
VRfu� add re s s and ou t p u t
data
b
y
t e s
)
ADO
i s the mo s t s i g n
i
f i
c
a n
t
b it and
i s
used only for
da t a and no t f o r
ad
d
re
s s i ng
.
*
VRAM
r o
w
a dd re s s
s t robe
VRAN
co l umn
a dd re s s s t r o b e
VRAM w r
i
t e
s t robe
1 0 . 7
+
MHz
crys
t a l
i np u t s . **
VDP out put c l ock
XTAL/ 24. Typ ica l ly
not used
RESET
-
Th i s p i n is
a
t r i l e ve l i np u t p i n . When it is
be l ow 0 . 8 vo l t s ,
RESET
i n i t i
a
l i z e s th e VDP . Whe n
it
is above
9 v
o
l
t s
,
RESET
is t he synchr o n i z ing i np u t for
e x t e rna l vi d e o .
The VDP i s
e x
t
e rn
a
l l
y
ini t ia l i z e d
whe ne v e r
t he
RESET
i np u
t
i s a c t i ve
(
low
)
and mu s t
b e
he l d low fo r a min imum o f
3
m ic r o s e c on d s .
T
h
e
external
RESET
s ynchron i z e s a l l
c l ocks w i th i t s
f
a
l l in
g
e dg e ,
se t s the hor i zon t a l and ve rt ica l
coun t e rs a s known
s t a t e s , and c l ea rs VDP r
e
g
i
s
t
e r
0
and 1 .
The video
d i sp l a y
is
a
u to
m a
t i
c
a
l l y b lank e d s ince
the BLANK b i t
i n VDP r
e
g i
s
t e
r
1
b
ec
om
e s a ' 0 ' .
The V D
P
,
howeve r ,
cont i nuous to
re f resh
the VRAM
e
ve
n
through the
disp lay
i s bl anked .
Wh i l e t he RESET
i s
a c t ive , the VDP d oes not
r
e
f
re
sh
VRAM .
4 . 41