3
Da
ta
Bit
3
Data
Bit
3
Ena
b
l
e
0
MODEM
Sta
tu
s
Interr
upt
(E
DSSI
)
4
Da
ta
Bit
4
Data
Bi
t
4
0
0
5
Da
ta
Bi
t
5
Da
ta
Bi
t
5
0
0
6
Da
ta
Bi
t
8
Da
ta
Bit
6
0
0
7
Da
ta
Bi
t
7
Da
ta
Bi
t
7
0
0
Bit
0
is
the
least
bit
.
It
is
the
Parity
Out
2
Fr
am
in
g
Data
Bit
2
En
ab
le
Error
Rece
iver
(P
EN
)
(P
E)
Li
ne
Si
gna
l
Detect
(D
RL
SD)
Even
Loop
Br
eak
Cle
ar
Bit
4
Par
ity
Int
er
-
to
Send
Se
le
ct
rupt
(C
TS
)
(E
P
S
)
(BI)
St
ic
k
0
Tr
ans-
Data
Set
Bit
5
Par
ity
mitter
Rea
dy
Holdi
ng
(D
SR)
Re
gister
Emp
ty
(T
SRE)
Set
0
Tra
ns-
Ri
ng
Bit
6
Br
eak
m
i
tte
r
Indi-
Sh
ift
cator
Re
gister
(R
I)
Emp
ty
(T
SRE
)
Di
vi
sor
0
0
Rece
iv
ed
Bit
7
L
a
t
c
h
Li
ne
Ac
cess
Si
gn
a
l
Bit
De
tect
(
DL
AB
)
(R
LSO
)
fi
rst
bit
tr
ansm
itted
or
·r
e
ceiv
ed.
Bit
11
Bit
12
Bit
13
Bit
14
Bit
15
M
\0
.
..,.
Содержание MKI
Страница 1: ...SERVICE TECHNICAL MANUAL VOL 1 l SVI318 328 MKI MKII COMPUTER SYSTEM SVI SPECTRAVIDEO ...
Страница 7: ...4 Remove the seven retaining screens 5 Remove the cover 2 2 ...
Страница 8: ...6 Remove the screens on the metal cover 7 Remove the metal cover 2 3 ...
Страница 9: ...To r e assemble u se the above procedures in the rever se order 2 4 ...
Страница 134: ...5 CIRCUIT SCHEMATIC AND COMPONENT LAYOUT 5 1 ...