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SH61F83
43
10.8. RXFLG0
USB Receive FIFO Flag/Control Register for Endpoint 0
00EFH
RXFLG0
Initial Value
USB RX FIFO Flag/Control Register
Bit[7:6]
-
00B
-
Reserved
Bit5
RXERR
0B
R/W
Receiving error on pipe 0
. When device receives a DATA packet with CRC
or bit stuffing errors, this bit is set. Write “0” to clear, Write “1” no effect.
Reset Source: Hardware reset or USB reset
Bit4
R0_OW
0B
R
This bit is set as long as receiving FIFO is corrupted by setup token
Reset Source: Hardware reset or USB reset
Bit3
R0SEQ
0B
R
The data toggle bit of receiving transaction on pipe 0
. This bit is updated
by hardware as long as pipe 0 receives a setup or out transaction.
Reset Source: Hardware reset or USB reset
Bit2
OUT0ENB
0B
R/W
0: The device will receive the data of OUT0 packet when RX FIFO 0 is empty
and respond ACK if no bit stuffing error or CRC error.
1: The SH61F83 will respond OUT0 token with NAK.
Reset Source: Hardware reset or USB reset
Bit1
STLR0
0B
R/W
Pipe 0 stall bits
. STLR0 bit is used to stall the pipe 0 OUT token.
0: responds ACK, NAK or not respond to OUT token.
1: SIE will respond STALL to HOST OUT token.
Reset Source: Hardware reset or USB reset
Bit0
R0FULL
0B
R/W
RXDAT0 FIFO full bit
. Set to “1” by H/W when the RX FIFO 0 fills with valid
data.
0: Empty.
1: Full.
Write “0” to clear, Write “1” no effect.
Reset Source: Hardware reset or USB reset
10.9. CRWCON
EP0 Control Read/Write Function Control Register
00E9H
CRWCON Initial Value
EP0 Control Read/Write Setup Register
Bit [7:3]
-
00000B
-
Reserved
Bit 2
CRSEQ
0B
R/W
Select “Valid OUT0 Token” for “STLCR” as Data 1 or Data 0/1.
0: “Valid OUT0 Token” include both OUT Token with “Data 1” & “Data 0”
1: “Valid OUT0 Token” means only OUT Token with “Data 1”
Reset Source: Hardware reset, USB reset, SETUP
Bit 1
STLCR
0B
R/W
1: Enable H/W set “STLR0” and “STLT0” bits when a “valid OUT0 token”
was processed
0: Disabled
Reset Source: Hardware reset, USB reset, SETUP
Bit 0
STLCW
0B
R/W
1: Enable H/W set “STLT0” and “STLR0” bits when a “valid IN0 token” was
processed
0: Disabled
Reset Source: Hardware reset, USB reset, SETUP