Silicon Laboratories Si4010-C2, Руководство пользователя

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Si4010-C2
90 Rev. 1.0
Description of the XREG register fields on the previous pages includes only the used register bits. The
fields are aligned towards the LSB byte of the XREG register. If the actual XREG register is wider then the
field described the missing bits towards MSB byte are all read as 0's and writing to them has no effect. For
example, the register wPA_CAP contains a single 9 bit field. Since it is more than 8 bits and less then 16 it
occupies two bytes. That's why the prefix letter 'w' denoting a two byte WORD. The bits [15:9] are read as
all zeros and write has no effect. They are aligned towards MSB byte of the wPA_CAP, the one at lower
address since the byte ordering is in big endian fashion.
Table 25.4. XREG Registers
XREGs are listed in alphabetical order.
Register Address Description Page
lFC_COUNT
0x4008 Frequency Counter Output 53
bLPOSC_TRIM
0x4002 Low Power Oscillator Trim 47
abMTP_RDATA[16]
0X4040 MTP_Read Data Bytes 68
wPA_CAP
0x400C PA Variable Capacitor 38
bPA_TRIM
0x4012 PA MAX Drive bit 39
bXO_CTRL
0x4016 XO Control 49