Sleep mode is exited when an enabled wakeup event occurs, whereupon the PMU will initiate a
wakeup sequence. The wakeup sequence turns on the core and pad power supplies while
asserting reset on the clocks, core and pads. After the power supplies stabilize, the clock reset
is deasserted to allow the clocks to stabilize. Once the clocks are stable, the pad and processor
resets are deasserted, and the processor begins running from the reset vector.
Software must reinitialize the core and can interrogate the PMU
pmucause
register to determine
the cause of reset, and can recover pre-sleep state from the backup registers. The processor
always initially runs from the HFROSC at the default setting, and must reconfigure clocks to run
from an alternate clock source (HFXOSC or PLL) or at a different setting on the HFROSC.
Because the FE310-G003 has no internal power regulator, the PMU’s control of the power sup-
plies is through chip outputs,
pmu_out_0
and
pmu_out_1
. The system integrator can use these
outputs to enable and disable the power supplies connected to the FE310-G003.
Chapter 7 Power Modes
FE310-G003 Manual
© SiFive, Inc.
Page 35
Содержание FE310-G003
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