Communication memory
The communication memory comprises a central battery-backed RAM
in the PLC. It has three areas: 1) the communication flags (256 bytes),
2) the semaphores (32), and 3) four memory pages.
The communication flags are located in memory area F200H to
F2FFH. The communication flags enable the cyclic interchange of
small volumes of data between the CPUs in the S5-135U/155U PLC.
The four memory pages serve for the exchange of data blocks between
CPUs.
Please consult the Programming Guides of the CPUs to program these
two functions.
The semaphores are used to coordinate the CPUs for access to the
same I/O address (see Programming Guides, operations SES and
SEF).
Addressing method for the page memory (vector register)
The vector register serves to form subaddresses of several memories
in a common address area. The register is an 8-bit register which is
written to under address FEFFH. It cannot be read out.
The page memory contains four pages of 1 Kbyte. An identification
number is assigned to each page. These are the numbers 252, 253,
254 and 255.
Page Memory for
Data Blocks
Vector Register
for Page Selection,
Fault Register
Synchronization
Area for
Operating Systems
Communication Flags
FEFFH
F7FFH
F400H
F300H
F200H
Page No.
253
Page No.
254
Page No.
255
Page No.
252
Figure 6-8
Areas of the Communication Memory on the S5 Bus
6
923C Coordinator Module
System Manual
C79000-B8576-C199-03
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