X1
X2
EP 6 0
1 6
9
8
1
( J R )
EP 6 1
1 6
9
8
1
( J X)
S1
M o d e Switch
(RUN, STOP, TEST )
S2
S3
X4
EP 6 4
1 6
9
8
1
( J U )
X6
X5
EP 6 2
1 6
9
8
1
( J Y)
EP 6 3
1 6
9
8
1
( J Z )
F r o n t Vi e w
S1 , S2 , S3
S1
on off
1
2
3
4
5
6
S2
1
2
3
4
5
6
on
off
S3
1
2
3
4
5
6
7
8
on
off
Figure 6-2
Locations of Jumper Sockets and Switches on the 923C Coordinator and Front View of
Switches S1 to S3 (when Delivered)
6
Starting the Multiprocessor Operation
System Manual
C79000-B8576-C199-03
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