Chapter 1) 7SR23 DAD Description Of Operation
©2013 Siemens Protection Devices Limited
Chapter 1 Page 4 of 36
6.8
Real Time Clock.................................................................................................................34
6.8.1
Time Synchronisation – Data Comms ....................................................................34
6.8.2
Time Synchronisation – Binary Input ......................................................................34
6.8.3
Time Synchronisation – IRIG-B (Optional)..............................................................34
6.9
Settings Groups .................................................................................................................34
6.10
Password Feature ..............................................................................................................35
List of Figures
Figure 1-1
Connection Diagram: 7SR23 DAD Relay.........................................................................8
Figure 2-1
7SR23 DAD with 3 + 8 LEDs in E6 Case .......................................................................10
Figure 2-2
Binary Input Logic..........................................................................................................13
Figure 2-3
Binary Output Logic.......................................................................................................15
Figure 3-1
Protection Functions......................................................................................................16
Figure 3-2
Logic Diagram: Differential Protection............................................................................17
Figure 3-3
Logic Diagram: Measured Earth Fault Element..............................................................18
Figure 3-4
Logic Diagram: Restricted Earth Fault Protection...........................................................19
Figure 3-5
Logic Diagram: ‘3 Pole Diff + REF’ Protection................................................................20
Figure 3-6
Logic Diagram: ‘3 Pole Diff + EF’ Protection ..................................................................21
Figure 3-7
Logic Diagram: ‘REF1 + REF2’ Protection .....................................................................22
Figure 4-1
Logic Diagram: Protection In/Out Switching ...................................................................23
Figure 4-2
Sequence Diagram showing PU/DO Timers in Quick Logic (Counter Reset
Mode Off)......................................................................................................................25
Figure 5-1
Logic Diagram: CT Supervision .....................................................................................26
Figure 5-2
Logic Diagram: 87/50SFM and 87/50BF ........................................................................27
Figure 5-3
Logic Diagram: CB Position Monitoring..........................................................................28
Figure 5-4
Logic Diagram: Ext 87CBF ...........................................................................................28
Figure 5-5
Logic Diagram: Trip Circuit Supervision Feature (74TCS) ..............................................29
List of Tables
Table 1-1
7SR23 DAD Ordering Options .........................................................................................7
Table 2-1
Summary of 7SR23 DAD Relay Configurations................................................................9
Table 6-1
Operating Mode ............................................................................................................33
Содержание 7SR23 DAD
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