REGISTERS
KS8910 100/10 Mbps ETHERNET TRANSCEIVER
7-6
Preliminary Spec. ver
1.4
PHY IDENTIFIER 1 : REGISTER 2
[PHYIDR1] 02h
PHY IDENTIFIER 2 : REGISTER 3
[PHYIDR2] 03h
02h
15
0
OUI_MSB
•
OUI_MSB
OUI Most Significant Bits
OUI MOST SIGNIFICANT BITS: This register stores bits 3 to 18 of the
OUI (000000h) to bits 15 to 0 of this register respectively. The most
significant two bits of the OUI are ignored. The OUI_MSB should be
programmed by the system manufacturer to reflect the OUI assigned
to their organization.
Initial value:0000 0000 1111 0000
03h
15
10
9
4
3
0
OUI_LSB
VNDR_MDL
MDI_REV
•
MDI_REV
Model Revision Number
Four bits of vendor model revision number mapped to bit 3 to 0 (most
significant bit to bit 3)
Initial value:0000
•
VNDR_MDL
Vendor Model Number
Six bits of vendor model number mapped to bits 9 to 4 (most significant
bit to 9). The VNDR_MDL and MDI_REV should be programmed by
the system manufacturer to reflect the product model and revision
which uses this KS8910.
Initial Value:00 1111
•
OUI_LSB
OUI Least Significant Bits
Bits 19 to 24 of the OUI (000000h)
are mapped to bits 15 to 10 of this
register respectively. The OUI_LSB should be programmed by the
system manufacturer to reflect the OUI assigned to their organization.
Initial Value:0000 00
Содержание KS8910
Страница 1: ...20 8910 0599 USER S MANUAL KS8910 100 10 Mbps Ethernet Transceriver PHY Preliminary ...
Страница 4: ...PRELIMINARY SPECIFICATION vi KS8910 100 10 Mbps ETHERNET CONTROLLER ...
Страница 21: ...EXTERNAL SIGNALS KS8910 100 10 Mbps ETHERNET TRANSCEIVER 2 8 Preliminary Spec ver 1 4 MEMO ...
Страница 47: ...10BASE T DIGITAL BLOCKS KS8910 100 10 Mbps ETHERNET TRANSCEIVER 5 6 Preliminary Spec ver 1 4 MEMO ...
Страница 89: ...APPLICATION NOTE KS8910 100 10 Mbps ETHERNET TRANSCEIVER 9 2 Preliminary Spec ver 1 4 MEMO ...
Страница 91: ...MECHANICAL DATA KS8910 100 10 Mbps ETHERNET TRANSCEIVER 10 2 Preliminary Spec ver 1 4 MEMO ...
Страница 99: ...A 8 APPENDIX KS8910 100 10 Mbps ETHERNET TRANSCEIVER Preliminary Spec ver 1 4 NOTES ...