REGISTERS
KS8910 100/10 Mbps ETHERNET TRANSCEIVER
7-4
Preliminary Spec. ver
1.4
•
PhyLoop
PHY Loopback
1 = Enable loop back mode
0 = Disable loop back mode (default)
The loopback function enables MII transmit data to be routed to the MII
receive data path. This loopback will go through the PMA and the RX
clock will be TX clock.
•
PhyRst
PHY Reset
1 = KS8910 reset
0 = Normal operation (default)
This bit set the status registers and all of the states of PHY to their
default value. This bit, which is self-clearing, returns a value of zero
until the reset process is complete.
Содержание KS8910
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Страница 4: ...PRELIMINARY SPECIFICATION vi KS8910 100 10 Mbps ETHERNET CONTROLLER ...
Страница 21: ...EXTERNAL SIGNALS KS8910 100 10 Mbps ETHERNET TRANSCEIVER 2 8 Preliminary Spec ver 1 4 MEMO ...
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Страница 89: ...APPLICATION NOTE KS8910 100 10 Mbps ETHERNET TRANSCEIVER 9 2 Preliminary Spec ver 1 4 MEMO ...
Страница 91: ...MECHANICAL DATA KS8910 100 10 Mbps ETHERNET TRANSCEIVER 10 2 Preliminary Spec ver 1 4 MEMO ...
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