9. Timers
Rev.3.00 Jul. 19, 2007 page 212 of 532
REJ09B0397-0300
Register Configuration
Table 9.3 shows the register configuration of timer A.
Table 9.3
Timer A Registers
Name Abbr.
R/W
Initial
Value
Address
Timer mode register A
TMA
R/W
H'10
H'FFB0
Timer counter A
TCA
R
H'00
H'FFB1
9.2.2 Register
Descriptions
Timer Mode Register A (TMA)
Bit
7 6 5 4 3 2 1 0
TMA7
TMA6
TMA5
⎯
TMA3 TMA2 TMA1 TMA0
Initial
value 0 0 0 1 0 0 0 0
Read/Write R/W
R/W
R/W
⎯
R/W R/W R/W R/W
TMA is an 8-bit read/write register for selecting the prescaler, input clock, and output clock.
Upon reset, TMA is initialized to H'10.
Bits 7 to 5—Clock Output Select (TMA7 to TMA5):
Bits 7 to 5 choose which of eight clock
signals is output at the TMOW pin. The system clock divided by 32, 16, 8, or 4 can be output in
active mode and sleep mode. A 32.768 kHz signal divided by 32, 16, 8, or 4 can be output in
active mode, sleep mode, and subactive mode.
Bit 7: TMA7
Bit 6: TMA6
Bit 5: TMA5
Clock Output
0 0 0
φ
/32 (initial
value)
1
φ
/16
1
0
φ
/8
1
φ
/4
1 0 0
φ
W
/32
1
φ
W
/16
1
0
φ
W
/8
1
φ
W
/4
Содержание F-ZTAT H8 Series
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