Renesas F-ZTAT H8 Series, Руководство по оборудованию

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Appendix A CPU Instruction Set
Rev.3.00 Jul. 19, 2007 page 446 of 532
REJ09B0397-0300
Addressing Mode/
Instruction Length (Bytes) Condition Code
Mnemonic
Operand Siz
e
Operation
#xx:
8/16
Rn @Rn @(d:16,
Rn)
@–Rn/@Rn+ @aa:
8/16
@(d:8,
PC)
@@aa Implied
I H N Z V C
No.
of States
BSET #xx:3, Rd B (#xx:3 of Rd8)
←
1 2
⎯ ⎯ ⎯ ⎯ ⎯ ⎯
2
BSET #xx:3, @Rd B (#xx:3 of @Rd16)
←
1 4
⎯ ⎯ ⎯ ⎯ ⎯ ⎯
8
BSET #xx:3, @aa:8 B (#xx:3 of @aa:8)
←
1 4
⎯ ⎯ ⎯ ⎯ ⎯ ⎯
8
BSET Rn, Rd B (Rn8 of Rd8)
←
1 2
⎯ ⎯ ⎯ ⎯ ⎯ ⎯
2
BSET Rn, @Rd B (Rn8 of @Rd16)
←
1 4
⎯ ⎯ ⎯ ⎯ ⎯ ⎯
8
BSET Rn, @aa:8 B (Rn8 of @aa:8)
←
1 4
⎯ ⎯ ⎯ ⎯ ⎯ ⎯
8
BCLR #xx:3, Rd B (#xx:3 of Rd8)
←
0 2
⎯ ⎯ ⎯ ⎯ ⎯ ⎯
2
BCLR #xx:3, @Rd B (#xx:3 of @Rd16)
←
0 4
⎯ ⎯ ⎯ ⎯ ⎯ ⎯
8
BCLR #xx:3, @aa:8 B (#xx:3 of @aa:8)
←
0 4
⎯ ⎯ ⎯ ⎯ ⎯ ⎯
8
BCLR Rn, Rd B (Rn8 of Rd8)
←
0 2
⎯ ⎯ ⎯ ⎯ ⎯ ⎯
2
BCLR Rn, @Rd B (Rn8 of @Rd16)
←
0 4
⎯ ⎯ ⎯ ⎯ ⎯ ⎯
8
BCLR Rn, @aa:8 B (Rn8 of @aa:8)
←
0 4
⎯ ⎯ ⎯ ⎯ ⎯ ⎯
8
BNOT #xx:3, Rd B (#xx:3 of Rd8)
←
(
#xx:3 of Rd8
)
2
⎯ ⎯ ⎯ ⎯ ⎯ ⎯
2
BNOT #xx:3, @Rd B (#xx:3 of @Rd16)
←
(
#xx:3 of @Rd16
)
4
⎯ ⎯ ⎯ ⎯ ⎯ ⎯
8
BNOT #xx:3, @aa:8 B (#xx:3 of @aa:8)
←
(
#xx:3 of @aa:8
)
4
⎯ ⎯ ⎯ ⎯ ⎯ ⎯
8
BNOT Rn, Rd B (Rn8 of Rd8)
←
(
Rn8 of Rd8
)
2
⎯ ⎯ ⎯ ⎯ ⎯ ⎯
2
BNOT Rn, @Rd B (Rn8 of @Rd16)
←
(
Rn8 of @Rd16
)
4
⎯ ⎯ ⎯ ⎯ ⎯ ⎯
8
BNOT Rn, @aa:8 B (Rn8 of @aa:8)
←
(
Rn8 of @aa:8
)
4
⎯ ⎯ ⎯ ⎯ ⎯ ⎯
8
BTST #xx:3, Rd B (
#xx:3 of Rd8
)
→
Z 2
⎯ ⎯ ⎯ ⎯ ⎯
2
BTST #xx:3, @Rd B (
#xx:3 of @Rd16
)
→
Z 4
⎯ ⎯ ⎯ ⎯ ⎯
6
BTST #xx:3, @aa:8 B (
#xx:3 of @aa:8
)
→
Z 4
⎯ ⎯ ⎯ ⎯ ⎯
6
BTST Rn, Rd B (
Rn8 of Rd8
)
→
Z 2
⎯ ⎯ ⎯ ⎯ ⎯
2
BTST Rn, @Rd B (
Rn8 of @Rd16
)
→
Z 4
⎯ ⎯ ⎯ ⎯ ⎯
6
BTST Rn, @aa:8 B (
Rn8 of @aa:8
)
→
Z 4
⎯ ⎯ ⎯ ⎯ ⎯
6