Renesas F-ZTAT H8 Series, Руководство по оборудованию

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8. I/O Ports
Rev.3.00 Jul. 19, 2007 page 183 of 532
REJ09B0397-0300
P2
P2
P2
P2
P2
P2
P2
P2 /
IRQ
/
ADTRG
7
6
5
4
3
2
1
0
Port 2
4
Figure 8.2 (b) H8/3854 Group Port 2 Pin Configuration
8.3.2 Register Configuration and Description
Table 8.5 shows the port 2 register configuration.
Table 8.5 Port 2 Registers
Name Abbr. R/W Initial Value Address
Port data register 2 PDR2 R/W H'00 H'FFD5
Port control register 2 PCR2 W H'00 H'FFE5
Port mode register 2 PMR2 R/W H'C0 H'FFC9
Port mode register 4 PMR4 R/W H'00 H'FFCB
Port Data Register 2 (PDR2)
Bit 7 6 5 4 3 2 1 0
P2
7
P2
6
P2
5
P2
4
P2
3
P2
2
P2
1
P2
0
Initial value 0 0 0 0 0 0 0 0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
PDR2 is an 8-bit register that stores data for pins P2
7
through P2
0
. If port 2 is read while PCR2 bits
are set to 1, the values stored in PDR2 are read, regardless of the actual pin states. If port 2 is read
while PCR2 bits are cleared to 0, the pin states are read.
Upon reset, PDR2 is initialized to H'00.