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Rabbit 6000 User’s Manual
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27
The 32.768 kHz circuit consumes microampere-level currents and has a very high impedance, making it
susceptible to noise, moisture, and environmental contaminants. It is strongly recommended to confor-
mally coat this circuit to limit the effects of humidity and dust on the oscillation frequency. Details about
this requirement are available in Technical Note TN303, “Conformal Coating”, from the Rabbit Web site.
The need for a conformal coating can be avoided by using a single external clock chip.
The 32.768 kHz oscillator is slow to start oscillating after power-on. The startup delay may be as much as
5 seconds. For this reason, a wait loop in the BIOS waits until this oscillator is oscillating regularly before
continuing the startup procedure. If the clock is battery-backed, there will be no startup delay since the
oscillator is already oscillating. Crystals with low series resistance (R < 35 k
) will start faster.
The 32 kHz oscillator can be used to drive the processor and the peripheral clock to provide significant
power savings in “ultra-sleepy” modes. The 32 kHz oscillator can be divided by 2, 4, 8, or 16 to provide
clock speeds as low as 2.048 kHz, although there are limitations on use of the 1MB internal RAM at those
low clock speeds (See Section 5.3.1, “Internal RAM”). Special self-timed chip selects are available to keep
the memory devices enabled for as short a time as possible when an ultra-sleepy mode is enabled; see
Chapter 36 for more details on reducing power consumption.
When the 32 kHz clock is enabled as the CPU clock, the periodic interrupt is disabled automatically. The
real-time clock and watchdog timers keep running, and use the full 32 kHz clock speed even when the pro-
cessor and peripheral clocks use a divider on the 32 kHz clock.
Table 2-6. Ultra-Sleepy Clock Modes
GPSCR
Setting
Processor and
Peripheral Clock
xxxxx000
32.768 kHz
xxxxx100
16.384 kHz
xxxxx101
8.192 kHz
xxxxx110
4.096 kHz
xxxxx111
2.048 kHz
Содержание 6000
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Страница 420: ...Rabbit 6000 User s Manual digi com 420 Figure 37 1 Memory Read and Write Cycles...