User’s Manual
207
Figure 16-4 illustrates the sources that create memory access time delays.
Figure 16-4. Sources of Memory Access Time Delays
The gross memory access time is 2T, where T is the clock period. To calculate the actual
memory access time, subtract the clock to address output time, the data in setup time, and
the clock period shortening due to the clock spectrum spreader from 2T.
Example
•
clock = 29.49 MHz,
•
T = 34 ns,
•
operating voltage is 3.3 V,
•
bus loading is 60 pF,
•
address to output time = 8 ns (see Table 16-2),
•
data setup time = 1 ns,
•
the spectrum spreader is on in normal mode, resulting in a loss of 3 ns.
The access time is given by
access time = 2T - (clock to address) - (data setup) - (spreader delay)
= 68 ns - 8 ns - 1 ns - 3 ns
= 56 ns
data out
address
memory access
time
clock period shortening
output enable
memory output enable
time
clock
data in setup time
clock to
(early)
output
address
due to spectrum spreader
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