Rabbit 3000, Руководство пользователя

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76 Rabbit 3000 Microprocessor
7.2 Clock Doubler
The clock doubler is provided to allow a lower frequency crystal to be used for the main
oscillator and to provide an added range of clock frequency adjustability. The clock dou-
bler uses an on-chip delay circuit that must be programmed by the user at startup if there is
a need to double the clock.
When the clock doubler is used and there is no subsequent division of the clock, the output
clock will be asymmetric, as shown in Figure 7-2. The doubled-clock low time is subject
to wide (50%) variation since it depends on process parameters, temperature, and voltage.
The times given above are for a supply voltage of 3.3 V and a temperature of 25°C. The
doubled-clock low time increases by 20% when the voltage is reduced to 2.5 V, and
increases by about 40% when the voltage is reduced further to 2.0 V. The values increase
or decrease by 1% for each 5°C increase or decrease in temperature. The doubled clock is
created by xor’ing the delayed and inverted clock with itself. If the original clock does not
have a 50-50 duty cycle, then alternate clocks will have a slightly different length. Since
Table 7-3. Global Clock Double Register (GCDR, adr = 0fh)
Global Clock Double Register (GCDR) (Address = 0x0F)
Bit(s) Value Description
7:4 xxxx Reserved
3:0
0000 The clock doubler circuit is disabled.
0001 6 ns nominal low time (4-9) 55+ MHz processor clock speed
0010 7 ns nominal low time (4.2-10.5) 50-55 MHz
0011 8 ns nominal low time (4.8-12) 45-50 MHz
0100 9 ns nominal low time (6-13.5) 38-45 MHz
0101 10 ns nominal low time (6-15) 29-38 MHz
0110 11 ns nominal low time (6.6-16.5) 20-29 MHz
0111 12 ns nominal low time (7.2-18) less than 20 MHz
1000 13 ns nominal low time
1001 14 ns nominal low time
1010 15 ns nominal low time
1011 16 ns nominal low time
1100 17 ns nominal low time
1101 18 ns nominal low time
1110 19 ns nominal Low time.
1111 20 ns nominal Low time