Circuit Diagrams and PWB Layouts
89
7.
SSB: PNX5050: Dual LVDS
27
26
12
4
5
6
7
PCI_AD<0:
3
1>
10
11
12
1
3
14
15
XIO_ACK
XIO_D<
8
:15>
GPIO<26:
3
4>
PCI_C_BE
XIO_
S
EL
3
2
1
0
PCI_CLK
PCI_INTA_
0
1
2
3
4
3
1
XIO_AD
3
0
29
2
8
24
2
3
22
25
21
14
15
16
17
1
8
19
20
8
9
10
11
PCI_
S
ERR_
PCI_PERR_
PCI_GNT_B_
PCI_REQ_B_
PCI_GNT_A_
PCI_REQ_A_
PCI_GNT_
PCI_REQ_
PCI_DEV
S
EL_
PCI_ID
S
EL
PCI_
S
TOP_
PCI_TRDY_
PCI_IRDY_
PCI_FRAME_
PCI_PAR
3
2
1
0
8
9
1
3
JTAG
S
Y
S
_R
S
T_OUT_
XTAL_OUT
POR_IN
PCI_
S
Y
S
_CLK
XTAL_IN
RE
S
ET_IN
TM
S
TCK
TDO
TDI
RE
S
ERVED2
FC1F
1C01
5-147279-2
FC1E
+
3
V
3
-D
9C12
+
3
V
3
-D
3
C5
3
-4
10K
FC1D
7
+
3
V
3
-D
+
3
V
3
-D
3
C01-2 C5
3
C01-
3
C6
3
C04 E1
3
3
C05 E14
3
C06 D1
3
7
8
9
10
12
5
1 : ENABLE
S
11
2
3
4
5
6
I
1C01 B6
1C05 D2
2C00 D2
1 0 1 : 64MB
1 0 0 :
3
2MB
0 : 2.5 CLK
S
RE
S
1 0 : HO
S
T-A
SS
I
S
TED
IC02 G
3
IC00 H
3
MEM_
S
IZE
ass
ert
S
W
IC01 G
3
IC0
3
G
3
FUNCTION
1
3
14
A
B
C
3
4
5
6
RE
S
RE
S
14
11
1
12
1
3
3
C
3
2 C
8
3
C
33
C7
3
C
3
4 C7
3
C
3
5 C7
3
C
3
7 F
3
3
C07 G1
3
C10-2 G2
3
C10-
3
H1
3
C10-4 E10
0:
8
-
b
it ROM/100khz
110 : 12
8
MB
1
9C11 D7
FC11 D6
FC10 D6
FC12 D6
9C12 D7
9C14 D7
9C1
3
D7
3
C01-1 C6
3
C00-1 D1
3
TD0
RE
S
4
D
E
F
G
0 : DI
S
ABLE
S
2
2C01 D2
0
3
C00-4 D1
3
prod
u
ct
S
W
10
FOR DEVELOPMENT
EN_PCI_ARB
1
2
RE
S
CA
S
_LATENCY
RE
S
8
9
7
TCK
3
FC16 D6
6
9C10 D
8
PNX5050: CONTROL
3
C5
3
-
3
G1
3
C5
3
-4 G2
7C00-1 D5
7C00-4 B11
FC1
3
D6
FC14 D4
FC17 B7
TM
S
TDI
9C04 D7
FC1A C7
FC1B C7
FC1C C7
FC1D C7
FC1E C7
FC1F D4
RE
S
3
C15 G1
3
C27-1 H2
3
C27-2 H2
3
C27-
3
H2
IC0
8
I
3
IC06 H
3
BOOTMODE
3
C27-4 I2
IC04 G
3
3
C
3
0 C7
3
C2
8
H2
HC_FA
S
TMODE
3
C
3
1 C7
IC07 E11
IC05 H
3
H
I
A
B
C
D
E
F
G
H
BOOTMODE
1 :
3
CLK
S
1 1 : EEPROM
ROM_WIDTH
1:16-
b
it ROM/400khz
7
+
3
V
3
-D
3
6
IC04
10K
3
C10-
3
3
C
3
2
10K
IC06
2
FC1A
3
C27-2
10K
7
IC02
10K
3
C
3
7
3
6
IC0
3
RE
S
10K
3
C5
3
-
3
FC1
3
+
3
V
3
-D
3
C27-4
10K
54
IC0
8
+
3
V
3
-D
22R
3
C
33
3
C
3
1
10K
3
C
3
4
10K
FC1B
+
3
V
3
-D
GND-PLL
FC10
3
C10-2
10K
2
10K
RE
S
IC05
3
C2
8
9C11
GND-PLL
FC12
1
10
2
3
4
5
6
7
8
9
3
C07
10K
RE
S
FC17
IC00
+
3
V
3
4
5
100R
3
C00-4
9C10
3
C15
RE
S
10K
3
C01-1
1
8
10K
100R
3
C06
FC16
FC14
9C04
3
C27-
3
6
3
10K
2C01
27p
3
C04
100R
RE
S
+
3
V
3
-D
D11
D9
A1
D6
D5
E25
A11
AB2
3
C7
D10
Φ
S
Y
S
TEM
B1
FC11
PNX5050EH/M1
7C00-1
1
8
10K
3
C27-1
3
C01-
3
10K
3
6
+
3
V
3
-D
27p
2C00
FC1C
1C05
27M
1
8
5
3
C00-1
100R
3
C10-4
10K
4
IC07
EMC REF HOLE
1X01
10K
3
C
3
0
+
3
V
3
-D
9C1E
9C1F
9C1D
9C1C
9C1A
9C1B
10K
3
C
3
5
100R
3
C05
RE
S
7
3
C01-2
10K
2
IC01
AD26
AC2
3
AB24
9C14
AC19
Y25
Y24
AD25
AA26
AA25
AB26
AB25
H2
3
R25
P24
N24
AC20
AA24
AC22
AE26
D26
K26
D2
3
N25
R24
P2
3
F2
3
G2
3
V25
R2
3
M26
K24
P26
N26
D24
D25
J25
K2
3
H26
H25
J2
3
G26
H24
E2
3
N2
3
M2
3
M24
L26
L25
L24
L2
3
J26
U24
T2
3
U26
T24
T25
T26
R26
M25
W2
3
Y26
W24
W25
W26
V2
3
V26
U2
3
Φ
7C00-4
PNX5050EH/M1
Y2
3
4
5
PCI_XIO
9C1
3
JTAG-TDO
JTAG-TR
S
T
JTAG-TM
S
JTAG-TCK
TDI
JTAG-TD-PNX5050-PACIFIC
BOOTMODE0
PCI-REQ-PNX5050
PCI-GNT-PNX5050
TCK
TM
S
TDO
BOOTMODE5
BOOTMODE4
BOOTMODE2
BOOTMODE
3
BOOTMODE1
PCI-AD
3
PCI-AD2
PCI-AD1
PCI-AD0
S
CL-PNX5050
S
DA-PNX5050
BOOTMODE7
BOOTMODE6
PCI-AD22
PCI-AD20
PCI-AD1
8
PCI-AD15
PCI-AD1
3
PCI-AD11
PCI-AD9
PCI-AD7
PCI-AD5
PCI-AD4
PCI-AD17
PCI-AD16
PCI-AD14
PCI-AD12
PCI-AD10
PCI-AD
8
PCI-AD6
PCI-AD
3
0
PCI-AD2
8
PCI-AD26
PCI-AD24
PNX5050-R
S
T-OUTn
RE
S
ET-
S
Y
S
TEM
RE
S
ET-
S
Y
S
TEM
PCI-AD
3
1
PCI-AD29
PCI-AD27
PCI-AD25
PCI-AD2
3
PCI-AD21
PCI-AD19
S
CL-
SS
B
S
DA-
SS
B
PCI-PAR
PCI-PERR
PCI-
S
ERR
PCI-
S
TOP
PCI-TRDY
PCI-REQ-U
S
B20
PCI-GNT-U
S
B20
PCI-AD25
PCI-CLK-PNX5050
PCI-CBE0
PCI-CBE1
PCI-CBE2
PCI-CBE
3
PCI-DEV
S
EL
PCI-FRAME
PCI-IRDY
B05A
B05A
I_17960_0
3
9.ep
s
22050
8
3
1
3
9 12
3
6
3
41.2
Содержание 32PFL7403D/10
Страница 59: ...Circuit Diagrams and PWB Layouts 59 Q528 2E LB 7 Layout LCD Supply 37 B 42 Top Side H_16750_070 eps 110108 ...
Страница 60: ...60 Q528 2E LB 7 Circuit Diagrams and PWB Layouts Layout LCD Supply 42 Bottom Side H_16750_071 eps 110108 ...
Страница 126: ...126 Q528 2E LB 7 Circuit Diagrams and PWB Layouts Personal Notes E_06532_013 eps 131004 ...