Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.
9.5.8
Diagram B06C, T6TF4HFG (Pacific 3) (IC 7GE2)
Figure 9-14 Internal block diagram and pin configuration
Block Diagram
Pin Configuration
G_16840_099.eps
090207
LVD
S
de
co
d
e
r
PLL2
LV
D
S
de
c
o
d
e
r
PLL1
CM
OS
in
p
u
t
Input Proc
MVL manager
Video Q meter
Noise estimator
Content
Detection
Sharpness
Contr. enhance
H LTI
Histogram
Text enhance
Color processing
Contr, Brightness
&
White-point corr
Contrast Reserve
&
Clip Measure
Color LUT
& Dithering
Output buffering
80C51
32kB
ROM
16kB
XRAM
IC2_1
UART
IC2_2
Control
reg. IF
Interrupt
contr
L
V
DS
/C
MOS RGB I
N
I2
C
_
1
2
30
L
VDS
/C
MOS
RG
B
O
U
T
2
ND
CM
O
S
RG
B
O
U
T
/
P
F
L
AS
H
AND
UA
RT
30
256B
MRAM
I2
C
_
2
ADDR/DATA/RDN/WRN/
PSEN/TXD/RXD
RST
N
IN
T
_
N
SYNC
6
Timing
control
Unit
CM
O
S
ou
tp
u
t
LVDS
enco
d
er
LV
D
S
en
c
o
d
e
r
3
PW
M
inp_sync
PWM
3
SY
N
C
T1
Test
control
BST
GP
IO
TD
O
CL
K
_
IN
C
LK_O
U
T
TC
K
TD
I
TM
S
TR
ST
AmbiLight
60
M
H
Z
R
E
S
I2
C
_
3
SPI
T
R
IGOUT
SI
SO
SC
K
CS
PW
M
6
30
Pat
gen
Color gamut
mapping
PACIFIC3-N2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
21
6
21
5
21
4
21
3
21
2
21
1
21
0
20
9
20
8
20
7
20
6
20
5
20
4
20
3
20
2
20
1
20
0
19
9
19
8
19
7
19
6
19
5
19
4
19
3
19
2
19
1
19
0
18
9
18
8
18
7
18
6
18
5
18
4
18
3
18
2
18
1
18
0
17
9
178 17
7
17
6
17
5
17
4
17
3
17
2
17
1
17
0
16
9
16
8
16
7
16
6
16
5
16
4
16
3
L
VD
S
-o
i
nput
L
VD
S
-e
i
nput
R
dat
a
i
n
put
G
d
a
ta
input
B
da
ta
in
pu
t
s
y
nc i
JTAG
JTAG
I
2
Cs0
I
2
Cm
SPI
6 X GPIO
PWM
OSC
F dat
a
outpu
t
E d
a
ta
o
u
tp
u
t
D dat
a
outp
u
t
Pr
oc data bus
Pro
c
addr
ess
bus
sync o
B data output
A data output
Ambi-PWM
LVDS-o output
LVDS-e output
UART
Interrupt
test
reset
cl
ko
C data output
I
2
Cs1
SPI
Содержание 32PFL7403D/10
Страница 59: ...Circuit Diagrams and PWB Layouts 59 Q528 2E LB 7 Layout LCD Supply 37 B 42 Top Side H_16750_070 eps 110108 ...
Страница 60: ...60 Q528 2E LB 7 Circuit Diagrams and PWB Layouts Layout LCD Supply 42 Bottom Side H_16750_071 eps 110108 ...
Страница 126: ...126 Q528 2E LB 7 Circuit Diagrams and PWB Layouts Personal Notes E_06532_013 eps 131004 ...
