Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.
9.5.7
Diagram B05C, PNX5050 (IC 7C00)
Figure 9-13 Internal block diagram and pin configuration
Block Diagram
Pin Configuration
H_16800_129.eps
090507
MAIN MEMORY
INTERFACE
DDR SDRAM
4 : 2 : 2 VIDEO IN
AUDIO IN
SPDIF IN
BOOT, RESET,
CLOCKS
SCALER,
DEINTERLACER
INSTR
CACHE
300 MHz
32-BIT
CPU
DATA
CACHE
2D DRAWING
ENGINE
XIO INTERFACE
FLASH
MEMORY
MISCELLANEOUS
I/O,
TIMERS,
COUNTERS
I
2
C
4 : 4 : 4 VIDEO IN
PICTURE
IMPROVEMENT
IMAGE
COMPOSITION
AUDIO OUT
LCD
OUTPUT
ROUTER
SD video ITU-R BT.656
I
2
S-bus audio
27 MHz
I
2
C-bus
GPIO
SPDIF audio
HD video YUV
4 : 2 : 2
HD / PC YUV /
RGB 4 : 4 : 4
24-bit RGB/
30-bit RGB
I
2
S-bus audio
SPDIF audio
SPDIF OUT
A
C
E
G
J
L
N
R
U
W
AA
AC
AE
B
D
F
H
K
M
P
T
V
Y
AB
AD
AF
2
4
6
8
10 12 14 16 18 20 22 24 26
1
3
5
7
9
11 13 15 17 19 21 23 25
PNX5050
Содержание 32PFL7403D/10
Страница 59: ...Circuit Diagrams and PWB Layouts 59 Q528 2E LB 7 Layout LCD Supply 37 B 42 Top Side H_16750_070 eps 110108 ...
Страница 60: ...60 Q528 2E LB 7 Circuit Diagrams and PWB Layouts Layout LCD Supply 42 Bottom Side H_16750_071 eps 110108 ...
Страница 126: ...126 Q528 2E LB 7 Circuit Diagrams and PWB Layouts Personal Notes E_06532_013 eps 131004 ...