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LC8.1U LA

Circuit Diagrams and PWB Layouts

SSB: SRP List Part 1

H_17740_040.eps

240108

Netname

Schematic

+0V9_VTT B4B

(2x)

+12VAAudio B3 (2x)
+12VAudio B1

(1x)

+12VAudio B3 (1x)
+12VAudio B4F

(1x)

+12VDAudio B3 (2x)
+12Vdisp B1

(2x)

+12Vdisp B4D

(1x)

+12Vdisp_DETECT B1

(2x)

+12Vdisp_DETECT B4F

(1x)

+12VS B1

(3x)

+12VS B2

(1x)

+12VS B4C

(1x)

+1V1_CD B7L

(8x)

+1V1_FPGA B6K

(2x)

+1V1_FPGA_PLL B6K

(2x)

+1V1_RGBADC B4F

(2x)

+1V1_RGBFE B4F

(2x)

+1V1_SW B1

(3x)

+1V1_SW B4A

(5x)

+1V1_SW B4E

(1x)

+1V1_SW B4F

(1x)

+1V1_SW B5P

(4x)

+1V1_SW B6K

(1x)

+1V1_SW B7L

(1x)

+1V1_VGA B4F

(2x)

+1V8_SW B1

(3x)

+1V8_SW B4A

(1x)

+1V8_SW B4B

(7x)

+1V8_SW B4E

(1x)

+1V8_SW B5P

(1x)

+1V8_SW B5Q

(3x)

+1V8HDMI_AMUX B4E

(3x)

+1V8HDMI_DMUX B4E

(2x)

+24V_BOLT-ON B6K

(1x)

+2V5 B1

(1x)

+2V5 B4A

(1x)

+2V5 B4F

(1x)

+2V5 B6K

(1x)

+2V5_AVADC B4F

(2x)

+2V5_DVADC B4F

(2x)

+2V5_FPGAin B6K

(2x)

+2V5_FPGAout B6K

(2x)

+2V5_REF B4F

(2x)

+2V5_VFE B4F

(3x)

+3V3_ACD B7L

(5x)

+3V3_ADC B4F

(3x)

+3V3_DAC B4F

(2x)

+3V3_DCD B7L

(10x)

+3V3_DIG B4F

(2x)

+3V3_FPGA B6K

(13x)

+3V3_LVDS B4D

(5x)

+3V3_PI B7M

(4x)

+3V3_PLL B4D

(2x)

+3V3_REFP B4F

(2x)

+3V3_SW B1

(4x)

+3V3_SW B4A

(2x)

+3V3_SW B4C

(21x)

+3V3_SW B4D

(3x)

+3V3_SW B4E

(3x)

+3V3_SW B4F

(4x)

+3V3_SW B5P

(13x)

+3V3_SW B5R

(8x)

+3V3_SW B6K

(2x)

+3V3_SW B7L

(2x)

+3V3_SW B7M

(5x)

+3V3HDMI_AMUX B4E

(2x)

+3V3STBY B1

(2x)

+3V3STBY B3 (2x)
+3V3STBY B4C

(5x)

+3V3STBY B4E

(9x)

+3V3STBY B7M

(1x)

+5V_HDMI_1 B4E

(4x)

+5V_HDMI_2 B4E

(3x)

+5V_HDMI_3 B4E

(3x)

+5V_HDMI_BDS B4E

(1x)

+5V_HDMI_Mux B4E

(2x)

+5V_HDMI_SIDE B4E

(3x)

+5V_SW B1

(3x)

+5V_SW B2

(1x)

+5V_SW B4C

(1x)

+5V_SW B4D

(1x)

+5V_SW B4E

(7x)

+5V_SW B4F

(1x)

+5Vdisp B1

(1x)

+5Vdisp B4D

(1x)

+5VHDMI_1 B4E

(2x)

+5VHDMI_2 B4E

(2x)

+5VHDMI_3 B4E

(2x)

+5VHDMI_SIDE B4E

(2x)

+5VS B2

(6x)

+5Vtuner B2

(2x)

+VDISP B4D

(4x)

-12VAAudio B3 (5x)
-12VAudio B1

(1x)

-12VAudio B3 (1x)
-12VAudio B4F

(1x)

-12VDAudio B3 (3x)
5V B4F

(1x)

8280_DETECT B4C

(2x)

8280_DETECT B5P

(2x)

AMBI_SCL B6K

(2x)

AMBI_SCL_OUT B6K

(1x)

AMBI_SDA B6K

(2x)

AMBI_SDA_OUT B6K

(1x)

ANA-DIG_DIM_SELECT B1

(2x)

ANA-DIG_DIM_SELECT B4C

(2x)

ANA-DIG_DIM_SELECT B4F

(1x)

ANTI_PLOP B3 (2x)
ANTI_PLOP B4C

(2x)

ASDO B6K

(2x)

ASPDIF B4F

(1x)

AV3_CVBS_in B4F

(1x)

AV3_L_in B4F

(1x)

AV3_R_in B4F

(1x)

AV3_SC_in B4F

(1x)

AV3_SY_in B4F

(1x)

BACKLIGHT_BOOST B1

(2x)

BACKLIGHT_BOOST B4C

(2x)

BACKLIGHT_ON_OFF B1

(2x)

BACKLIGHT_ON_OFF B4F

(1x)

BACKLIGHT_ON_OFF B5P

(2x)

CEC B4C

(2x)

CEC B4E

(7x)

CHDEC_RESET B4C

(2x)

CHDEC_RESET B7L

(2x)

CHIP_DETECT B4F

(1x)

CTRL_DISP1_uP B4C

(2x)

CTRL_DISP1_uP B4D

(2x)

CTRL_DISP4_uP B4C

(2x)

CTRL_DISP4_uP B4D

(2x)

CVBS_OUT B2

(2x)

CVBS_OUT B4F

(2x)

CVBS_OUT B7M

(2x)

DATA0 B6K

(2x)

DC_PROT B3 (2x)
DC_PROT B4C

(2x)

DCLK B6K

(2x)

DDC_RESET B4C

(2x)

DDC_RESET B4E

(8x)

DDC_SCL_1 B4E

(1x)

DDC_SCL_2 B4E

(1x)

DDC_SCL_3 B4E

(1x)

DDC_SCL_HDMI_1 B4C

(2x)

DDC_SCL_HDMI_1 B4E

(2x)

DDC_SCL_HDMI_2 B4E

(2x)

DDC_SCL_HDMI_3 B4E

(1x)

DDC_SCL_HDMI_MUX B4C

(2x)

DDC_SCL_HDMI_MUX B4E

(2x)

DDC_SCL_HDMI_SIDE B4E

(1x)

DDC_SCL_SIDE B4E

(1x)

DDC_SDA_1 B4E

(1x)

DDC_SDA_2 B4E

(1x)

DDC_SDA_3 B4E

(1x)

DDC_SDA_HDMI_1 B4C

(2x)

DDC_SDA_HDMI_1 B4E

(2x)

DDC_SDA_HDMI_2 B4E

(2x)

DDC_SDA_HDMI_3 B4E

(1x)

DDC_SDA_HDMI_MUX B4C

(2x)

DDC_SDA_HDMI_MUX B4E

(2x)

DDC_SDA_HDMI_SIDE B4E

(1x)

DDC_SDA_SIDE B4E

(1x)

DM B4F

(1x)

DP B4F

(1x)

EDID_WE B4C

(2x)

EDID_WE B4E

(8x)

FATIN- B2

(2x)

FATIN- B7L

(2x)

FATIN+ B2

(2x)

FATIN+ B7L

(2x)

FLASH_MJC_WE B5P

(1x)

FLASH_WE B4C

(1x)

FLASH_WE B4F

(1x)

GND_24V B6K

(5x)

Gnd_CVBS_OUT B2

(1x)

Gnd_CVBS_OUT B4F

(1x)

GND1V2 B1

(5x)

GND1V8 B1

(5x)

GND3V3 B1

(5x)

GND5V B1

(5x)

GNDDC1 B1

(14x)

GNDDC2 B1

(29x)

GNDSND B1

(1x)

GNDSND B3 (22x)
HDMI_HPD_1 B4C

(2x)

HDMI_HPD_1 B4E

(2x)

HDMI_HPD_2 B4C

(2x)

HDMI_HPD_2 B4E

(2x)

HDMI_HPD_3 B4C

(2x)

HDMI_HPD_3 B4E

(2x)

HDMI_HPD_SIDE B4C

(1x)

HDMI_HPD_SIDE B4E

(2x)

HDMI_RESET B4C

(2x)

HDMI_RESET B4E

(2x)

HP_DETECT B4C

(4x)

HP_DETECT B4F

(3x)

HP_LOUT B3 (2x)
HP_LOUT B4F

(3x)

HP_ROUT B3 (2x)
HP_ROUT B4F

(2x)

I2S_SEL1 B6K

(1x)

I2S_SEL2 B6K

(1x)

IF_AGC_ChDec B2

(2x)

IF_AGC_ChDec B7L

(2x)

IF_AGC_MAIN B2

(2x)

IF_AGC_MAIN B4A

(2x)

INT_CEC B4E

(1x)

INT_CEC B4F

(1x)

INT0 B4C

(2x)

INT0 B5P

(1x)

INTERRUPT B4F

(1x)

INTERRUPT B7M

(2x)

IR B4C

(3x)

IR B4E

(1x)

IR B7M

(2x)

JRTCK B4C

(2x)

JTAG_DBGACK B4C

(2x)

JTAG_DBGRQ B4C

(2x)

JTCK B4C

(2x)

JTDI B4C

(2x)

JTDO B4C

(2x)

JTMS B4C

(2x)

JTRSTn B4C

(2x)

KEYBOARD B4C

(2x)

KEYBOARD B4E

(2x)

LCD_PWR_ON B4D

(3x)

LCD_PWR_ON B4F

(1x)

LCD_PWR_ON B5P

(2x)

LED1 B4C

(2x)

LED1 B4E

(1x)

LED2 B4C

(2x)

LED2 B4E

(1x)

LEFT- B3 (2x)
LVDS_A_TXe0n B4D

(2x)

LVDS_A_TXe0n B5R

(2x)

LVDS_A_TXe0p B4D

(2x)

LVDS_A_TXe0p B5R

(2x)

LVDS_A_TXe1n B4D

(2x)

LVDS_A_TXe1n B5R

(2x)

LVDS_A_TXe1p B4D

(2x)

LVDS_A_TXe1p B5R

(2x)

LVDS_A_TXe2n B4D

(2x)

LVDS_A_TXe2n B5R

(2x)

LVDS_A_TXe2p B4D

(2x)

LVDS_A_TXe2p B5R

(2x)

LVDS_A_TXe3n B4D

(2x)

LVDS_A_TXe3n B5R

(2x)

LVDS_A_TXe3p B4D

(2x)

LVDS_A_TXe3p B5R

(2x)

LVDS_A_TXe4n B4D

(2x)

LVDS_A_TXe4n B5R

(2x)

LVDS_A_TXe4p B4D

(2x)

LVDS_A_TXe4p B5R

(2x)

LVDS_A_TXeCLKn B4D

(2x)

LVDS_A_TXeCLKn B5R

(2x)

LVDS_A_TXeCLKp B4D

(2x)

LVDS_A_TXeCLKp B5R

(2x)

LVDS_A_TXo0n B4D

(2x)

LVDS_A_TXo0n B5R

(2x)

LVDS_A_TXo0p B4D

(2x)

LVDS_A_TXo1n B4D

(2x)

LVDS_A_TXo1n B5R

(2x)

LVDS_A_TXo1p B4D

(2x)

LVDS_A_TXo1p B5R

(2x)

LVDS_A_TXo2n B4D

(2x)

LVDS_A_TXo2n B5R

(2x)

LVDS_A_TXo2p B4D

(2x)

LVDS_A_TXo2p B5R

(2x)

LVDS_A_TXo3n B4D

(2x)

LVDS_A_TXo3n B5R

(2x)

LVDS_A_TXo3p B4D

(2x)

LVDS_A_TXo3p B5R

(2x)

LVDS_A_TXo4n B4D

(2x)

LVDS_A_TXo4n B5R

(2x)

LVDS_A_TXo4p B4D

(2x)

LVDS_A_TXo4p B5R

(2x)

LVDS_A_TXoCLKn B4D

(2x)

LVDS_A_TXoCLKn B5R

(2x)

LVDS_A_TXoCLKp B4D

(2x)

LVDS_A_TXoCLKp B5R

(2x)

LVDS_B_TXe0n B4D

(2x)

LVDS_B_TXe0n B5R

(2x)

LVDS_B_TXe0p B4D

(2x)

LVDS_B_TXe0p B5R

(2x)

LVDS_B_TXe1n B4D

(2x)

LVDS_B_TXe1n B5R

(2x)

LVDS_B_TXe1p B4D

(2x)

LVDS_B_TXe1p B5R

(2x)

LVDS_B_TXe2n B4D

(2x)

LVDS_B_TXe2n B5R

(2x)

LVDS_B_TXe2p B4D

(2x)

LVDS_B_TXe2p B5R

(2x)

LVDS_B_TXe3n B4D

(2x)

LVDS_B_TXe3n B5R

(2x)

LVDS_B_TXe3p B4D

(2x)

LVDS_B_TXe3p B5R

(2x)

LVDS_B_TXe4n B4D

(2x)

LVDS_B_TXe4n B5R

(2x)

LVDS_B_TXe4p B4D

(2x)

LVDS_B_TXe4p B5R

(2x)

LVDS_B_TXeCLKn B4D

(2x)

LVDS_B_TXeCLKn B5R

(2x)

LVDS_B_TXeCLKp B4D

(2x)

LVDS_B_TXeCLKp B5R

(2x)

LVDS_B_TXo0n B4D

(2x)

LVDS_B_TXo0n B5R

(2x)

LVDS_B_TXo0p B4D

(2x)

LVDS_B_TXo1n B4D

(2x)

LVDS_B_TXo1n B5R

(2x)

LVDS_B_TXo1p B4D

(2x)

LVDS_B_TXo1p B5R

(2x)

LVDS_B_TXo2n B4D

(2x)

LVDS_B_TXo2n B5R

(2x)

LVDS_B_TXo2p B4D

(2x)

LVDS_B_TXo2p B5R

(2x)

LVDS_B_TXo3n B4D

(2x)

LVDS_B_TXo3n B5R

(2x)

LVDS_B_TXo3p B4D

(2x)

LVDS_B_TXo3p B5R

(2x)

LVDS_B_TXo4n B4D

(2x)

LVDS_B_TXo4n B5R

(2x)

LVDS_B_TXo4p B4D

(2x)

LVDS_B_TXo4p B5R

(2x)

LVDS_B_TXoCLKn B4D

(2x)

LVDS_B_TXoCLKn B5R

(2x)

LVDS_B_TXoCLKp B4D

(2x)

LVDS_B_TXoCLKp B5R

(2x)

LVDS_TXe0n B4D

(5x)

LVDS_TXe0n B5R

(2x)

LVDS_TXe0n B6K

(2x)

LVDS_TXe0n_FPGA B6K

(1x)

LVDS_TXe0p B4D

(5x)

LVDS_TXe0p B5R

(2x)

LVDS_TXe0p B6K

(2x)

LVDS_TXe0p_FPGA B6K

(1x)

LVDS_TXe1n B4D

(5x)

LVDS_TXe1n B5R

(2x)

LVDS_TXe1n B6K

(2x)

LVDS_TXe1n_FPGA B6K

(1x)

LVDS_TXe1p B4D

(5x)

LVDS_TXe1p B5R

(2x)

LVDS_TXe1p B6K

(2x)

LVDS_TXe1p_FPGA B6K

(1x)

LVDS_TXe2n B4D

(5x)

LVDS_TXe2n B5R

(2x)

LVDS_TXe2n B6K

(2x)

LVDS_TXe2n_FPGA B6K

(1x)

LVDS_TXe2p B4D

(5x)

LVDS_TXe2p B5R

(2x)

LVDS_TXe2p B6K

(2x)

LVDS_TXe2p_FPGA B6K

(1x)

LVDS_TXe3n B4D

(5x)

LVDS_TXe3n B5R

(2x)

LVDS_TXe3n B6K

(2x)

LVDS_TXe3n_FPGA B6K

(1x)

LVDS_TXe3p B4D

(5x)

LVDS_TXe3p B5R

(2x)

LVDS_TXe3p B6K

(2x)

LVDS_TXe3p_FPGA B6K

(1x)

LVDS_TXe4n B4C

(2x)

LVDS_TXe4n B4D

(6x)

LVDS_TXe4n B5R

(2x)

LVDS_TXe4n B6K

(2x)

LVDS_TXe4n_FPGA B6K

(1x)

LVDS_TXe4p B4C

(2x)

LVDS_TXe4p B4D

(6x)

LVDS_TXe4p B5R

(2x)

LVDS_TXe4p B6K

(2x)

LVDS_TXe4p_FPGA B6K

(1x)

LVDS_TXeCLKn B4D

(5x)

LVDS_TXeCLKn B5R

(2x)

LVDS_TXeCLKn B6K

(2x)

LVDS_TXeCLKp B4D

(5x)

LVDS_TXeCLKp B5R

(2x)

LVDS_TXeCLKp B6K

(2x)

LVDS_TXo0n B4D

(5x)

LVDS_TXo0n B5R

(2x)

LVDS_TXo0n B6K

(2x)

LVDS_TXo0n_FPGA B6K

(1x)

LVDS_TXo0p B4D

(5x)

LVDS_TXo0p B5R

(2x)

LVDS_TXo0p B6K

(2x)

LVDS_TXo0p_FPGA B6K

(1x)

LVDS_TXo1n B4D

(5x)

LVDS_TXo1n B5R

(2x)

LVDS_TXo1n B6K

(2x)

LVDS_TXo1n_FPGA B6K

(1x)

LVDS_TXo1p B4D

(5x)

LVDS_TXo1p B5R

(2x)

LVDS_TXo1p B6K

(2x)

LVDS_TXo1p_FPGA B6K

(1x)

LVDS_TXo2n B4D

(5x)

LVDS_TXo2n B5R

(2x)

LVDS_TXo2n B6K

(2x)

LVDS_TXo2n_FPGA B6K

(1x)

LVDS_TXo2p B4D

(5x)

LVDS_TXo2p B5R

(2x)

LVDS_TXo2p B6K

(2x)

LVDS_TXo2p_FPGA B6K

(1x)

LVDS_TXo3n B4D

(5x)

LVDS_TXo3n B5R

(2x)

LVDS_TXo3n B6K

(2x)

LVDS_TXo3n_FPGA B6K

(1x)

LVDS_TXo3p B4D

(5x)

LVDS_TXo3p B5R

(2x)

LVDS_TXo3p B6K

(2x)

LVDS_TXo3p_FPGA B6K

(1x)

LVDS_TXo4n B4D

(6x)

LVDS_TXo4n B5R

(2x)

LVDS_TXo4n B6K

(2x)

LVDS_TXo4n_FPGA B6K

(1x)

LVDS_TXo4p B4D

(6x)

LVDS_TXo4p B5R

(2x)

LVDS_TXo4p B6K

(2x)

LVDS_TXo4p_FPGA B6K

(1x)

LVDS_TXoCLKn B4D

(5x)

LVDS_TXoCLKn B5R

(2x)

LVDS_TXoCLKn B6K

(2x)

LVDS_TXoCLKp B4D

(5x)

LVDS_TXoCLKp B5R

(2x)

LVDS_TXoCLKp B6K

(2x)

LVDS1_SCL_DISP B4D

(1x)

LVDS1_TXe0n B4D

(1x)

LVDS1_TXe0p B4D

(1x)

LVDS1_TXe1n B4D

(1x)

LVDS1_TXe1p B4D

(1x)

LVDS1_TXe2n B4D

(1x)

LVDS1_TXe2p B4D

(1x)

LVDS1_TXe3n B4D

(1x)

LVDS1_TXe3p B4D

(1x)

LVDS1_TXe4n B4D

(1x)

LVDS1_TXe4p B4D

(1x)

LVDS1_TXeCLKn B4D

(1x)

LVDS1_TXeCLKp B4D

(1x)

LVDS1_TXo0n B4D

(1x)

LVDS1_TXo0p B4D

(1x)

LVDS1_TXo1n B4D

(1x)

LVDS1_TXo1p B4D

(1x)

LVDS1_TXo2n B4D

(1x)

LVDS1_TXo2p B4D

(1x)

LVDS1_TXo3n B4D

(1x)

LVDS1_TXo3p B4D

(1x)

LVDS1_TXo4n B4D

(1x)

LVDS1_TXo4p B4D

(1x)

LVDS1_TXoCLKn B4D

(1x)

LVDS1_TXoCLKp B4D

(1x)

LVDS2_TXe0n B4D

(1x)

LVDS2_TXe0p B4D

(1x)

LVDS2_TXe1n B4D

(1x)

LVDS2_TXe1p B4D

(1x)

LVDS2_TXe2n B4D

(1x)

LVDS2_TXe2p B4D

(1x)

LVDS2_TXe3n B4D

(1x)

LVDS2_TXe3p B4D

(1x)

LVDS2_TXe4n B4D

(1x)

LVDS2_TXe4p B4D

(1x)

LVDS2_TXeCLKn B4D

(1x)

LVDS2_TXeCLKp B4D

(1x)

LVDS2_TXo0n B4D

(1x)

LVDS2_TXo0p B4D

(1x)

LVDS2_TXo1n B4D

(1x)

LVDS2_TXo1p B4D

(1x)

LVDS2_TXo2n B4D

(1x)

LVDS2_TXo2p B4D

(1x)

LVDS2_TXo3n B4D

(1x)

LVDS2_TXo3p B4D

(1x)

LVDS2_TXo4n B4D

(1x)

LVDS2_TXo4p B4D

(1x)

LVDS2_TXoCLKn B4D

(1x)

LVDS2_TXoCLKp B4D

(1x)

LVDS3_TXe0n B4D

(1x)

LVDS3_TXe0p B4D

(1x)

LVDS3_TXe1n B4D

(1x)

LVDS3_TXe1p B4D

(1x)

LVDS3_TXe2n B4D

(1x)

LVDS3_TXe2p B4D

(1x)

LVDS3_TXe3n B4D

(1x)

LVDS3_TXe3p B4D

(1x)

LVDS3_TXe4n B4D

(1x)

LVDS3_TXe4p B4D

(1x)

LVDS3_TXeCLKn B4D

(1x)

LVDS3_TXeCLKp B4D

(1x)

LVDS3_TXo0n B4D

(1x)

LVDS3_TXo0p B4D

(1x)

LVDS3_TXo1n B4D

(1x)

LVDS3_TXo1p B4D

(1x)

LVDS3_TXo2n B4D

(1x)

LVDS3_TXo2p B4D

(1x)

LVDS3_TXo3n B4D

(1x)

LVDS3_TXo3p B4D

(1x)

LVDS3_TXo4n B4D

(1x)

LVDS3_TXo4p B4D

(1x)

LVDS3_TXoCLKn B4D

(1x)

LVDS3_TXoCLKp B4D

(1x)

LVSD1_SDA_DISP B4D

(1x)

MEM_VREF B4B

(4x)

MEM_VREF B5Q

(2x)

MJC_RA(0) B5Q

(3x)

MJC_RA(1) B5Q

(3x)

MJC_RA(10) B5Q

(3x)

MJC_RA(11) B5Q

(3x)

MJC_RA(12) B5Q

(3x)

MJC_RA(2) B5Q

(3x)

MJC_RA(3) B5Q

(3x)

MJC_RA(4) B5Q

(3x)

MJC_RA(5) B5Q

(3x)

MJC_RA(6) B5Q

(3x)

MJC_RA(7) B5Q

(3x)

MJC_RA(8) B5Q

(3x)

MJC_RA(9) B5Q

(3x)

MJC_RBA0 B5Q

(3x)

MJC_RBA1 B5Q

(3x)

MJC_RCASn B5Q

(3x)

MJC_RCKE B5Q

(3x)

MJC_RCLK0n B5Q

(1x)

MJC_RCLK1n B5Q

(1x)

MJC_RCSn B5Q

(3x)

MJC_RDQ(0) B5Q

(2x)

MJC_RDQ(1) B5Q

(2x)

MJC_RDQ(10) B5Q

(2x)

MJC_RDQ(11) B5Q

(2x)

MJC_RDQ(12) B5Q

(2x)

MJC_RDQ(13) B5Q

(2x)

MJC_RDQ(14) B5Q

(2x)

MJC_RDQ(15) B5Q

(2x)

MJC_RDQ(16) B5Q

(2x)

MJC_RDQ(17) B5Q

(2x)

MJC_RDQ(18) B5Q

(2x)

MJC_RDQ(19) B5Q

(2x)

MJC_RDQ(2) B5Q

(2x)

MJC_RDQ(20) B5Q

(2x)

MJC_RDQ(21) B5Q

(2x)

MJC_RDQ(22) B5Q

(2x)

MJC_RDQ(23) B5Q

(2x)

MJC_RDQ(24) B5Q

(2x)

MJC_RDQ(25) B5Q

(2x)

MJC_RDQ(26) B5Q

(2x)

MJC_RDQ(27) B5Q

(2x)

MJC_RDQ(28) B5Q

(2x)

MJC_RDQ(29) B5Q

(2x)

MJC_RDQ(3) B5Q

(2x)

MJC_RDQ(30) B5Q

(2x)

MJC_RDQ(31) B5Q

(2x)

MJC_RDQ(4) B5Q

(2x)

MJC_RDQ(5) B5Q

(2x)

MJC_RDQ(6) B5Q

(2x)

MJC_RDQ(7) B5Q

(2x)

MJC_RDQ(8) B5Q

(2x)

MJC_RDQ(9) B5Q

(2x)

MJC_RDQM0 B5Q

(2x)

MJC_RDQM1 B5Q

(2x)

MJC_RDQM2 B5Q

(2x)

MJC_RDQM3 B5Q

(2x)

MJC_RDQS0 B5Q

(1x)

MJC_RDQS0n B5Q

(2x)

MJC_RDQS1 B5Q

(1x)

MJC_RDQS1n B5Q

(2x)

MJC_RDQS2 B5Q

(1x)

MJC_RDQS2n B5Q

(2x)

MJC_RDQS3 B5Q

(1x)

MJC_RDQS3n B5Q

(2x)

MJC_RODT B5Q

(3x)

MJC_RRASn B5Q

(3x)

MJC_RWEn B5Q

(3x)

MJC_VREF B5Q

(4x)

MUTEn B3 (2x)
MUTEn B4C

(2x)

nCSO B6K

(2x)

PC_L_in B4F

(1x)

PC_R_in B4F

(1x)

POWER_DOWN B3 (2x)
POWER_DOWN B4C

(4x)

POWER_DOWN B4E

(2x)

PreAmpL B3 (2x)
PreAmpL B4F

(2x)

PreAmpR B3 (2x)
PreAmpR B4F

(2x)

PRST B4C

(2x)

PRST B5P

(1x)

PWM_DIMMING B1

(2x)

PWM_DIMMING B4C

(2x)

PWN B4C

(2x)

PWN B5P

(1x)

RA(0) B4B

(2x)

RA(1) B4B

(2x)

RA(10) B4B

(2x)

RA(11) B4B

(2x)

RA(12) B4B

(2x)

RA(2) B4B

(2x)

RA(3) B4B

(2x)

RA(4) B4B

(2x)

RA(5) B4B

(2x)

RA(6) B4B

(2x)

RA(7) B4B

(2x)

RA(8) B4B

(2x)

RA(9) B4B

(2x)

RCLK0n B4B

(1x)

RCLK1n B4B

(1x)

RDQ(0) B4B

(1x)

RDQ(1) B4B

(1x)

RDQ(10) B4B

(1x)

RDQ(11) B4B

(1x)

RDQ(12) B4B

(1x)

RDQ(13) B4B

(1x)

RDQ(14) B4B

(1x)

RDQ(15) B4B

(1x)

RDQ(16) B4B

(1x)

RDQ(17) B4B

(1x)

RDQ(18) B4B

(1x)

RDQ(19) B4B

(1x)

RDQ(2) B4B

(1x)

RDQ(20) B4B

(1x)

RDQ(21) B4B

(1x)

RDQ(22) B4B

(1x)

RDQ(23) B4B

(1x)

RDQ(24) B4B

(1x)

RDQ(25) B4B

(1x)

RDQ(26) B4B

(1x)

RDQ(27) B4B

(1x)

RDQ(28) B4B

(1x)

RDQ(29) B4B

(1x)

RDQ(3) B4B

(1x)

RDQ(30) B4B

(1x)

RDQ(31) B4B

(1x)

RDQ(4) B4B

(1x)

RDQ(5) B4B

(1x)

RDQ(6) B4B

(1x)

RDQ(7) B4B

(1x)

RDQ(8) B4B

(1x)

RDQ(9) B4B

(1x)

RDQM0 B4B

(1x)

RDQM1 B4B

(1x)

RDQM2 B4B

(1x)

RDQM3 B4B

(1x)

RDQS0n B4B

(1x)

RDQS1n B4B

(1x)

RDQS2n B4B

(1x)

RDQS3n B4B

(1x)

RESET_PI B4C

(2x)

RESET_PI B7M

(1x)

RIGHT+ B3 (2x)
RX1_0n B4E

(2x)

RX1_0p B4E

(2x)

RX1_1n B4E

(2x)

RX1_1p B4E

(2x)

RX1_2n B4E

(2x)

RX1_2p B4E

(2x)

RX1_Cn B4E

(2x)

RX1_Cp B4E

(2x)

RX2_0n B4E

(2x)

RX2_0p B4E

(2x)

RX2_1n B4E

(2x)

RX2_1p B4E

(2x)

RX2_2n B4E

(2x)

RX2_2p B4E

(2x)

RX2_Cn B4E

(2x)

RX2_Cp B4E

(2x)

RX3_0n B4E

(2x)

RX3_0p B4E

(2x)

RX3_1n B4E

(2x)

RX3_1p B4E

(2x)

RX3_2n B4E

(2x)

RX3_2p B4E

(2x)

RX3_Cn B4E

(2x)

RX3_Cp B4E

(2x)

RXBDS_0n B4E

(1x)

RXBDS_0p B4E

(1x)

RXBDS_1n B4E

(1x)

RXBDS_1p B4E

(1x)

RXBDS_2n B4E

(1x)

RXBDS_2p B4E

(1x)

RXBDS_Cn B4E

(1x)

RXBDS_Cp B4E

(1x)

RXMux_0n B4E

(2x)

RXMux_0p B4E

(2x)

RXMux_1n B4E

(2x)

RXMux_1p B4E

(2x)

RXMux_2n B4E

(2x)

RXMux_2p B4E

(2x)

RXMux_Cn B4E

(2x)

RXMux_Cp B4E

(2x)

RXSide_0n B4E

(2x)

RXSide_0p B4E

(2x)

RXSide_1n B4E

(2x)

RXSide_1p B4E

(2x)

RXSide_2n B4E

(2x)

RXSide_2p B4E

(2x)

RXSide_Cn B4E

(2x)

RXSide_Cp B4E

(2x)

SAV_CVBS_in B4F

(2x)

SAV_L_in B4F

(2x)

SAV_R_in B4F

(2x)

SAV_SC_in B4F

(2x)

SAV_SY_in B4F

(2x)

SCL B4C

(2x)

SCL B4D

(1x)

SCL B4E

(5x)

SCL B5P

(2x)

SCL B6K

(3x)

SCL B7L

(2x)

SCL B7M

(6x)

SCL_DISP B4D

(3x)

SDA B4C

(2x)

SDA B4D

(1x)

SDA B4E

(5x)

SDA B5P

(2x)

SDA B6K

(2x)

SDA B7L

(2x)

SDA B7M

(6x)

SDA_DISP B4D

(3x)

SIF_OUT B2

(2x)

SIF_OUT B4A

(2x)

SIF_OUT_GND B2

(2x)

SIF_OUT_GND B4A

(2x)

STANDBY B1

(2x)

STANDBY B4E

(2x)

STANDBY B7M

(2x)

STANDBYn B3 (2x)
STANDBYn B4D

(2x)

STANDBYn B4E

(1x)

TCK_FPGA B6K

(2x)

TDI_FPGA B6K

(2x)

TDO_FPGA B6K

(2x)

TMS_FPGA B6K

(2x)

TS_CLK B4A

(2x)

TS_CLK B4C

(2x)

TS_CLK B7M

(2x)

TS_DATA(0) B4A

(2x)

TS_DATA(0) B7M

(2x)

TS_DATA(1) B4A

(2x)

TS_DATA(1) B7M

(2x)

TS_DATA(2) B4A

(2x)

TS_DATA(2) B7M

(2x)

TS_DATA(3) B4A

(2x)

TS_DATA(3) B7M

(2x)

TS_DATA(4) B4C

(2x)

TS_DATA(4) B7M

(2x)

TS_DATA(5) B4C

(2x)

TS_DATA(5) B7M

(2x)

TS_DATA(6) B4C

(2x)

TS_DATA(6) B7M

(2x)

TS_DATA(7) B4C

(2x)

TS_DATA(7) B7M

(2x)

TS_SOP B4A

(2x)

TS_SOP B7M

(2x)

TS_VALID B4A

(2x)

TS_VALID B7M

(2x)

TUN_FE_CLK B7L

(2x)

TUN_FE_CLK B7M

(1x)

TUN_FE_DATA(0) B7L

(2x)

TUN_FE_DATA(0) B7M

(2x)

TUN_FE_DATA(1) B7L

(2x)

TUN_FE_DATA(1) B7M

(2x)

TUN_FE_DATA(2) B7L

(2x)

TUN_FE_DATA(2) B7M

(2x)

TUN_FE_DATA(3) B7L

(2x)

TUN_FE_DATA(3) B7M

(2x)

TUN_FE_DATA(4) B7L

(2x)

TUN_FE_DATA(4) B7M

(2x)

TUN_FE_DATA(5) B7L

(2x)

TUN_FE_DATA(5) B7M

(2x)

TUN_FE_DATA(6) B7L

(2x)

TUN_FE_DATA(6) B7M

(2x)

TUN_FE_DATA(7) B7L

(2x)

TUN_FE_DATA(7) B7M

(2x)

TUN_FE_ERR B7L

(1x)

TUN_FE_SOP B7L

(2x)

TUN_FE_SOP B7M

(1x)

TUN_FE_VALID B7L

(2x)

TUN_FE_VALID B7M

(1x)

TUNER_SCL B2

(4x)

TUNER_SCL B4A

(2x)

TUNER_SCL B7L

(2x)

TUNER_SDA B2

(4x)

TUNER_SDA B4A

(2x)

TUNER_SDA B7L

(2x)

TVREF#1 B4C

(2x)

UART_1RX B4C

(2x)

UART_1RX B5P

(2x)

UART_1TX B4C

(2x)

UART_1TX B5P

(2x)

UART_2RX B4C

(2x)

UART_2RX B7M

(2x)

UART_2TX B4C

(2x)

UART_2TX B7M

(2x)

USB_DM B4A

(2x)

USB_DM B4F

(2x)

USB_DP B4A

(2x)

USB_DP B4F

(2x)

USB_OC B4C

(2x)

USB_OC B4F

(2x)

USB_PWE B4C

(2x)

USB_PWE B4F

(2x)

VGA_B B4F

(2x)

VGA_B B7M

(2x)

VGA_Bn B4F

(2x)

VGA_Bn B7M

(2x)

VGA_G B4F

(2x)

VGA_G B7M

(2x)

VGA_Gn B4F

(2x)

VGA_Gn B7M

(2x)

VGA_HSYNC B4F

(2x)

VGA_HSYNC B7M

(2x)

VGA_R B4F

(2x)

VGA_R B7M

(2x)

VGA_Rn B4F

(2x)

VGA_Rn B7M

(2x)

VGA_SOG B4F

(2x)

VGA_SOG B7M

(2x)

VGA_VSYNC B4F

(2x)

VGA_VSYNC B7M

(2x)

VIN_ATV B2

(2x)

VIN_ATV B4F

(2x)

VIP_ATV B2

(2x)

VIP_ATV B4F

(2x)

Содержание 32PFL3403D/85

Страница 1: ...8 MG8 35 Block Diagram Video 36 Block Diagram Audio 37 Block Diagram Control Clock Signals 38 SSB Test Points Bottom Side 39 I2C IC Overview 40 Supply Lines Overview 41 7 Circuit Diagrams and PWB Layouts Diagram PWB SSB DC DC Converter B1 42 59 68 SSB Tuner Demodulator B2 43 59 68 SSB Class D Muting B3 44 59 68 SSB MT5382 Power Tuner B4A 45 59 68 SSB MT5382 DDR2 SDRAM B4B 46 59 68 SSB MT5382 Flash...

Страница 2: ... Viewing angle H V degrees 178 178 rest 160 160 52 Tuning system PLL Presets channels 100 presets Tuner bands VHF UHF S H TV Color systems ATSC NTSC Video playback NTSC Cable Unscrambled digital cable QAM Supported computer formats 60Hz 640 480 800 600 1024 768 1280 1024 1280 768 1360 768 1920 1080i 1920 1080p only for full HD sets Supported video formats 60Hz 480i 480p 720p 1080i 1080p only for f...

Страница 3: ... 9 10 11 1 D2 Data channel j 2 Shield Gnd H 3 D2 Data channel j 4 D1 Data channel j 5 Shield Gnd H 6 D1 Data channel j 7 D0 Data channel j 8 Shield Gnd H 9 D0 Data channel j 10 CLK Data channel j 11 Shield Gnd H 12 CLK Data channel j 13 n c 14 n c 15 DDC_SCL DDC clock j 16 DDC_SDA DDC data jk 17 Ground Gnd H 18 5V j 19 HPD Hot Plug Detect j 20 Ground Gnd H HDMI3 Cinch DVI Audio In 7 Rd Audio R 0 5...

Страница 4: ...e 1 4 PWB CBA locations 32 models Figure 1 5 PWB CBA locations 42 models I_17741_016 eps 280108 B MAIN SUPPLY PANEL SMALL SIGNAL BOARD J IR LED PANEL E A KEYBOARD CONTROL PANEL H_17650_083 eps 160108 H_17740_041 eps 240108 B MAIN SUPPLY PANEL SMALL SIGNAL BOARD J IR LED PANEL E A KEYBOARD CONTROL PANEL ...

Страница 5: ...re 1 6 PWB CBA locations 47 models Figure 1 7 PWB CBA locations 52 models I_17741_017 eps 280108 B MAIN SUPPLY PANEL SMALL SIGNAL BOARD J IR LED PANEL E A KEYBOARD CONTROL PANEL I_17741_018 eps 280108 B MAIN SUPPLY PANEL SMALL SIGNAL BOARD J IR LED PANEL E A KEYBOARD CONTROL PANEL ...

Страница 6: ...ter 5 with a color bar signal and stereo sound L 3 kHz R 1 kHz unless stated otherwise and picture carrier at 475 25 MHz for PAL or 61 25 MHz for NTSC channel 3 Where necessary measure the waveforms and voltages with D and without E aerial signal Measure the voltages in the power supply section both in normal operation G and in stand by F These values are indicated by means of the appropriate symb...

Страница 7: ... e g AG is Bruges digit 3 refers to the B O M code digit 4 refers to the Service version change code digits 5 and 6 refer to the production year and digits 7 and 8 refer to production week in example below it is 2006 week 17 The 6 last digits contain the serial number Figure 2 1 Serial number example 2 3 6 Board Level Repair BLR or Component Level Repair CLR If a board is defective consult your re...

Страница 8: ...ructions in described order Please pay special attention to the speaker wires when re assembling the set Place the cable tapes as shown in next figures 4 1 Cable Dressing Figure 4 1 Cable dressing 32 models ME8 styling CONNECTOR WITH LOCK INSERTED TO PSU CONNECTOR WITHOUT LOCK INSERTED TO PANEL Speaker cable dressing Pull cable taut underneath SSB Plate before taping to keep out of stand area Inve...

Страница 9: ...odels MG8 styling AC Mains Shield wire to be grounded to Detailed view of speaker cable dressing bottom corner of PSU with screw Pull cable taut underneath SSB Plate before CONNECTOR WITH LOCK INSERTED TO PSU CONNECTOR WITHOUT LOCK INSERTED TO PANEL I_17741_008 eps 240408 ...

Страница 10: ...LC8 1U LA 4 Figure 4 3 Cable dressing 42 models ME8 styling Figure 4 4 Cable dressing 42 models MG8 styling Tape tweeter wire to metal frame both ends to keep away from tweeter terminal I_17741_010 eps 240408 I_17741_011 eps 240408 ...

Страница 11: ...Mechanical Instructions EN 11 LC8 1U LA 4 Figure 4 5 Cable dressing 47 models ME8 styling Tape the 8C02 cable IR Board to SSB and the short red tweeter wire together I_17741_013 eps 240408 ...

Страница 12: ...Mechanical Instructions EN 12 LC8 1U LA 4 Figure 4 6 Cable dressing 47 models MG8 styling I_17741_012 eps 240408 ...

Страница 13: ...eaker Cables must not be parallel with AC Mains cable Tape speaker wires to prevent interference with speaker terminal NOTE For inverter cables the connector with ferrite is to be inserted at the PSU side Tape inverter cable so it stays in between the LCD Panel lamp holders as shown to avoid EMC Foam on SSB Bars I_17741_014 eps 240408 ...

Страница 14: ... in between the LCD Panel lamp holders as shown to avoid EMC Foam on SSB Bars Note horizontal orientation of wire saddle the IR and Speaker Cables must cross the AC Mains Cable with X shape and not lay in parallel NOTE For inverter cables the connector with ferrite is to be inserted at the PSU side I_17741_015 eps 250408 ...

Страница 15: ...tead 4 3 Assy Panel Removal ME8 Styling 4 3 1 Back Cover Warning Disconnect the mains power cord before you remove the back cover Note it is not necessary to remove the stand while removing the back cover Warning Most sets have an additional hatch located in the back cover These are meant for disconnecting the flat cables to the AmbiLight units in the back cover before the back cover is lifted fro...

Страница 16: ... the connectors 1 2 Remove the screws 2 3 Pull the unit sidewards from the back cover When defective replace the whole unit Figure 4 12 Ambilight Unit 4 3 3 Loudspeaker MG8 styling only 1 Unplug the connectors 2 Remove the screws 3 Remove the loudspeaker H_17740_024 eps 230108 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 2 2 H_17650_097 eps 180108 2 1 ...

Страница 17: ...efer to next figure for details 1 Unplug connectors 1 2 Use a flat screw driver to release the clip by pushing it in the indicated direction 2 3 Lift the board and take it out of the set When defective replace the whole unit Figure 4 15 IR LED Board 4 3 7 Key Board Refer to next figure for details 1 Unplug the key board connector from the IR LED board 2 Remove the screws 1 3 Lift the unit and take...

Страница 18: ... Unplug the LVDS connector s 1 Caution be careful as this is a very fragile connector 2 Unplug the connectors 2 3 Remove the screws 3 4 The SSB can now be taken out of the set together with the front shield and the side cover 5 To remove the shield remove the screws 4 and lift it of while releasing clips 5 6 Release clip 6 and slide the cover sidewards from the SSB Figure 4 18 Small Signal Board H...

Страница 19: ...set 6 Remove the fixation screws 4 and 5 7 Lift the subframe from the set 8 The LCD panel can now be lifted from the front cabinet Figure 4 19 LCD Panel example from 42 model 4 4 Set Re assembly To re assemble the whole set execute all processes in reverse order Notes Important While re assembling make sure that all cables and cable tapes are placed in their original position See figure Cable dres...

Страница 20: ...Pair has to be connected to the TV set via the ComPair connector which will be accessible through the rear of the set without removing the rear cover 5 2 1 General Some items are applicable to all Service Modes or are general These are listed below Life Timer During the life time cycle of the TV set a timer is kept called Op Hour It counts the normal operation hours not the Stand by hours The actu...

Страница 21: ...e Figure 5 3 SDM menu Menu explanation HHHHH Are the operating hours in decimal AAAABCD X YY See paragraph Service Modes General Software Identification Version and Cluster for the SW name definition EER Shows all errors detected since the last time the buffer was erased Five errors possible OP Used to read out the option bytes See Options in the Alignments section for a detailed description Ten c...

Страница 22: ...cription 5 NVM Editor To change the NVM data in the television set See also paragraph Fault Finding and Repair Tips 6 NVM Copy Gives the possibility to copy load the NVM file to from an USB stick Important NVM data copied to a USB memory device is named TV2USB bin When copied back to a TV the file first must be renamed to USB2TV bin How to Navigate In the SAM menu select menu items with the UP DOW...

Страница 23: ...erial number 3 Software Version Main software cluster and version is displayed 4 Option Code 1 Option code information group 1 5 Option Code 1 Option code information group 2 6 Codes Error buffer contents 7 SSB Indication of the SSB factory ID 12nc 8 Display Indication of the display ID 12 nc 9 NVM Version The NVM software version no 10 PQ Version PQ picture quality data version This is a subset o...

Страница 24: ...ailures in the TV set In principle a unique error code is available for every Activated protection Failing I2C device General I2C error SDRAM failure The last five errors stored in the NVM are shown in the Service menu s This is called the error buffer The error code buffer contains all errors detected since the last time the buffer was erased The buffer is written from left to right When an error...

Страница 25: ...ollowing occurs 1 long blink of 5 seconds to start the sequence 12 short blinks followed by a pause of 1 5 seconds 9 short blinks followed by a pause of 1 5 seconds 6 short blinks followed by a pause of 1 5 seconds 1 long blink of 1 5 seconds to finish the sequence The sequence starts again with 12 short blinks 5 5 2 Displaying the Entire Error Buffer Additionally the entire error buffer is displa...

Страница 26: ... volume can damage the audio amplifier 5 6 3 NVM Editor In some cases it can be convenient if one directly can change the NVM contents This can be done with the NVM Editor in SAM mode With this option single bytes can be changed Caution Do not change these without understanding the function of each setting because incorrect NVM settings may seriously hamper the correct functioning of the TV set Al...

Страница 27: ...D with the blinking sequence denoting the type of error detected When the system enters the protection mode due to a critical error it should be turned off and the failure cause needs to be resolved The system will function normally again after performing a power recycling once all protection causing failures have been resolved START UP SEQUENCE There are two cases of start up sequences namely AC ...

Страница 28: ...Service Modes Error Codes and Fault Finding EN 28 LC8 1U LA 5 Figure 5 9 Start up flowchart H_17740_034 eps 240108 ...

Страница 29: ...d Source Mute Audio MUTEn HIGH Disable RC LKB Key Enable RC LKB Key Disable RC LKB Key Wakeup Event Received Yes Disable DC_PROT POWER_DOWN INT Turn On Backlight BACKLIGHT_ON_OFF HIGH Unmute Audio MUTEn LOW Disable RC LKB Key Wait for Panel_Off_Time_2 based on Panel ID in ms from Panel Flash Switch off LVDS Signal Turn Off LVDS Power LCD_PWR_ON HIGH PWM_Dimming 0 Enable RC LKB Key Set Last Status ...

Страница 30: ...udio output and write protecting the system flash and EEPROM DC PROTECTION The following figure shows the DC_PROT interrupt flowchart Figure 5 12 DC Protection flowchart START MT5382 Detects POWER_DOWN INT POWER_DOWN INT based on falling edge trigger Wait for impending Power Off Note To Avoid False Triggering Write Protect Flash and System EEPROM Mute Audio Output System Idle Reconfirm POWER_DOWN ...

Страница 31: ...s in On mode The set will restart and the upgrading will start automatically As soon as the programming is finished you will get the message that you can remove your USB stick and restart the set Figure 5 13 SW upgrade flowchart LC08SSp User software upgrade flow chart Power off the set Plug in the USB stick Power on the set Detect USB break in and check autorun file Is USB sw version set sw Set r...

Страница 32: ...he TV main software and the software download application ProcessNVM_clustername_version zip Default NVM content Must be programmed via ComPair 5 7 4 How to Copy NVM Data to from USB Write NVM data to USB 1 Insert the USB stick into the USB slot while in SAM mode 2 Execute the command Copy to USB to copy the NVM data to the USB stick The NVM filename on the USB stick will be named NVM2USB bin this...

Страница 33: ...LET A MAIN POWER SUPPLY 1005 1D01 B4D 1 LVSD1_SDA_DISP 2 LVDS1_SCL_DISP 40 VDISP 41 VDISP CN2 1319 14 PDIM_Select 13 PWM 12 On Off 11 Vbri 10 GND3 9 GND3 8 GND3 7 GND3 6 GND3 5 24Vinv 4 24Vinv 3 24Vinv 2 24Vinv 1 24Vinv CN6 1M95 1 3V3Vstdby 2 Standby 3 GND1 4 GND1 5 GND1 6 12V 7 12V 8 12V 9 12V audio 10 GND2 11 12V audio CN7 1M99 1 12V 2 12V 3 GND1 4 GND1 5 BL_ON_OFF 6 DIM 7 Boost 8 ANALOG PWM dim...

Страница 34: ...YBOARD 1P11 1 GND 2 KEYBOARD 3 3V3STBY 4 TACT_SWITCH_INT CN1 1 N 2 L 1K03 B6K 6 GND_24V 5 24V_BOLT ON 4 GND_24V 3 24V_BOLT ON 2 GND_24V 1 24V_BOLT ON AMBI LIGHT UNIT IN BACK COVER 1175 8408 J4 8 I2C SEL2 7 3 3V 6 GND 5 S SDA 4 S SCL 3 GND 2 24V 1 24V J2 7 GND 6 3 3V 5 I2C SEL2 4 I2C SEL1 3 S SDA 2 GND 1 S SCL J1 4 GND 3 24V 2 GND 1 24V J4 1 24V 2 24V 3 GND 4 S SCL 5 S SDA 6 GND 7 3 3V 8 I2C SEL2 J...

Страница 35: ...11 N C 10 GND3 9 GND3 8 GND3 7 GND3 6 GND3 5 24Vinv 4 24Vinv 3 24Vinv 2 24Vinv 1 24Vinv CN6 1M95 1 3V3 stdby 2 Standby 3 GND1 4 GND1 5 GND1 6 12V 7 12V 8 12V 9 12V audio 10 GND2 audio 11 12V audio CN7 1M99 1 12V 2 12V 3 GND1 4 GND1 5 BL_ON_OFF 6 DIM 7 Boost 8 ANALOG PWM dimming WIRING 52 STYLING ME8 MG8 T 8AH 250V F1 1102 B1 8 ANA DIG_DIM_SELECT 7 BACKLIGHT_BOOST 6 PWM_DIMMING 5 BACKLIGHT_ON_OFF 4...

Страница 36: ...0P PR0P AV2 AV1 2 1 5 4 8 7 11 10 AF15 AE15 AF14 AE14 AF13 AE13 AF12 AE12 HDMI_RESET B4C 13 68 67 65 64 62 61 59 58 28 27 25 24 22 21 19 18 48 47 45 44 42 41 39 38 19 1 18 2 1 1E02 3 4 7 9 10 12 6 RX2_2p RX2_2n RX2_1p RX2_1n RX2_0p RX2_0n RX2_Cp RX2_Cn HDMI 2 CONNECTOR 19 1 18 2 1 1E03 3 4 7 9 10 12 6 HDMI 3 CONNECTOR 1 1E04 3 4 7 9 10 12 6 1 1E01 3 4 7 9 10 12 6 RX1_2p RX1_2n RX1_1p RX1_1n RX1_0p...

Страница 37: ...ECTOR 19 1 18 2 HDMI 1 CONNECTOR RX3_2p RX3_2n RX3_1p RX3_1n RX3_0p RX3_0n RX3_Cp RX3_Cn RXSide_2p RXSide_2n RXSide_1p RXSide_1n RXSide_0p RXSide_0n RXSide_Cp RXSide_Cn AF11 AE11 AF10 AE10 AF9 AE9 AF8 AE8 RXMux_2p RXMux_2n RXMux_1p RXMux_1n RXMux_0p RXMux_0n RXMux_Cp RXMux_Cn HDMI MUX B4E RXSide_2p RXSide_2n RXSide_1p RXSide_1n RXSide_0p RXSide_0n RXSide_Cp RXSide_Cn RX2_2p RX2_2n RX2_1p RX2_1n RX...

Страница 38: ...3 B1 12Vdisp_DETECT B24 FLASH_WE B25 7 1F13 AE3 AF3 B4A POWER TUNER 5 4 USB_OC USB_PWE Y5 5V_SW B4D LVDS 1P01 27M V22 V21 B5R POWER 15 SF_S0 2Mx8 FLASH 7P02 M25P16 VMF6P A8 16 SF_CK D8 7 SF_CS0 A7 8 SF_DO B8 9 FLASH_MJC_WE W16 A18 8280_DETECT Y6 INT0 V17 B18 C19 B19 AA4 PRST PWN Y18 W18 8280_DETECT INT0 PRST PWN MJC_RCLK0n F1 J8 K8 J8 K8 7K01 MT8280 AMBI FPGA B3 FAST_PLOP 11 D20 POWER_DOWN B3 35 B...

Страница 39: ...E59 F3 FF02 E4 FF03 E4 FF05 D4 FF07 D4 FF09 E4 FF11 E4 FF12 E4 FF13 D4 FF14 D3 FF15 D3 FF16 E2 FF17 D2 FF18 E3 FF19 D2 FF20 C2 FF21 D2 FF22 E2 FF23 D2 FF25 C4 FF26 D4 FF27 D4 FF28 D3 FF29 D3 FF30 D3 FF31 C3 FF32 D3 FF33 D3 FF34 D3 FF35 D3 FF36 D2 FF37 F1 FF38 F1 FF39 F1 FF40 F2 FF41 F5 FF42 B1 FF43 E1 FF44 B1 FF45 B1 FF46 B1 FF47 C1 FF49 E2 FF50 C2 FF51 E1 FG18 B7 FK01 B5 FK02 B4 FK03 B5 FK04 B4 F...

Страница 40: ...25P16 2Mx8 FLASH 7B02 EDE2516ACSE DDR2 SDRAM 7B03 EDE2516ACSE RDQ 0 31 RA 0 12 TO AMBI LIGHT MODULE OPTIONAL AMBI_SDA AMBI_SCL 5 6 4 7 3V3_SW 3V3_FPGA 7E02 M24C02 EEPROM 5 6 5VHDMI_2 3E02 3E01 HDMI 3 BACK HDMI 2 BACK 4x HDMI CONNECTOR MT5382 3V3_SW 3C01 3C02 7C13 SN74LVC2 7C12 SN74LVC2 1 1 UART_RX UART_TX 3C96 3C97 D21 C21 3C98 3C99 UART_1RX UART_1TX UART_0RX UART_0TX UART_2RX UART_2TX A10 DDC_SDA...

Страница 41: ...2VAAudio 3V3STBY 3V3STBY 5301 12VDAudio 3301 5305 12VAudio 12VAudio 12VAAudio 5302 12VDAudio 3302 5306 3V3_SW 3V3_SW 1V8_SW 1V8_SW 3V3_SW 3V3_SW 2V5 2V5 1V2 1V2 1V1_SW 1V1_SW 1V8_SW 1V8_SW 0V9_VTT 5V_SW 5V_SW 12VS 12VS 3V3STBY 3V3STBY 3V3_SW 3V3_SW 3V3_SW 3V3_SW 3V3_LVDS 5D01 3V3_PLL 5D02 5V_SW 5V_SW 12Vdisp 12Vdisp VDISP 7D02 7D03 LCD_PWR_ON 1V8_SW 1V8_SW 1V8HDMI_AMUX 5E01 1V8HDMI_DMUX 5E02 3V3_S...

Страница 42: ...00p 2155 3132 6K8 2121 3n3 I110 1u0 2102 100n 2147 4 5 6 7 8 9 68R 3102 1 10 11 2 3 1n0 1101 1 1735446 1 I168 2127 GNDDC2 22u 2105 1V8_SW GND3V3 6K8 3123 GND1V8 GNDDC2 I126 10u 5104 I141 2143 100n 5106 1V8_SW GNDDC1 10u 1K0 3120 I178 I161 GNDDC2 4K7 1 3162 1u0 2160 3151 6K8 3153 270R 1 22u I130 2106 100n 2104 BZX384 C8V2 6108 100n 2152 GNDDC2 3149 15K GNDDC2 F108 6109 I140 BZX384 C3V3 F113 F116 I1...

Страница 43: ... I210 B5 I211 B7 RES NC NC Y PROVISION FOR EXTERNAL RF AGC TO ANALOG IOs RES NC TO CHANNEL DECODER NC 4206 RES NC RES 4204 Y Y BDS Y TO POWER TUNER 0R NC NC F217 4202 I204 I202 F215 5VS 3200 330R 2209 10n F210 F209 100R 3210 30R 5206 2208 100p 2235 1n0 2212 Gnd_CVBS_OUT 22p 3203 220R I205 2215 10n 2222 10n 2211 5202 560n 2219 10u 5204 30R 4207 2225 390p 3211 100R 10n 2214 2218 470n 5VS 100n 2231 2...

Страница 44: ...D10 I317 E13 I318 D10 I319 D8 I321 E8 I322 E8 I329 E14 I330 D2 I333 D8 I335 C11 I336 D11 I337 D13 I338 E11 I339 E11 I340 E4 I342 C4 I343 D3 I344 E3 MUTING CIRCUIT TO FLASH NVM 4V7 12V2 3333 100n 2334 10K 7306 F302 SNDGND BC847BW 3343 22K 2322 100n 1n0 2331 1n0 2321 I307 7305 2SD2704K 470n 1n0 2345 2314 F301 F313 1K0 3332 3342 12VAAudio 10K 5307 12VDAudio 30R 12VAAudio 12VAudio GNDSND 4K7 3337 I304...

Страница 45: ...D51 E21 DVSS_GND52 E22 DVSS_GND53 E25 DVSS_GND54 D26 DVSS_GND6 L5 DVSS_GND41 R16 DVSS_GND42 T16 DVSS_GND43 K17 DVSS_GND44 M17 DVSS_GND45 R17 DVSS_GND46 U17 DVSS_GND47 L18 DVSS_GND48 N18 DVSS_GND34 P15 DVSS_GND35 R15 DVSS_GND36 U15 DVSS_GND37 L16 DVSS_GND38 M16 DVSS_GND39 N16 DVSS_GND4 Y4 DVSS_GND40 P16 DVSS_GND27 N14 DVSS_GND28 P14 DVSS_GND29 R14 DVSS_GND3 T4 DVSS_GND30 U14 DVSS_GND31 K15 DVSS_GND...

Страница 46: ...0n 2B32 100n 2B03 2B44 100n 2B39 100n 2B06 100u 16V 100n 2B38 D8 E7 F2 F8 H2 K3 A3 E3 J3 N1 P9 J7 A7 H8 B2 B8 D2 G9 C1 C3 C7 C9 E9 G1 G3 G7 J2 B3 B7 A8 A1 E1 J9 M9 R1 J1 A9 F7 E8 A2 E2 L1 R3 R7 R8 K9 K7 B9 H7 H3 H1 H9 F1 F9 C8 C2 F3 J8 K2 K8 L8 G8 G2 D7 D3 D1 D9 B1 M7 N2 N8 N3 N7 P2 P8 P3 L2 L3 L7 M8 M3 M2 P7 R2 7B02 EDE2516ACSE 6E E SDRAM Φ 3B15 47R 2B19 100n 2B59 100n 100n 2B46 2B50 1 8 100n 47R...

Страница 47: ... PDD2 B9 JRTCK D8 JTCK B6 JTDI B7 JTDO A6 JTMS A7 JTRST_ 7A01 5 MT5382 3C31 1 680R 4C03 4p7 2C18 4C05 FC23 4C04 3C15 100R 3C06 100R 2C20 1u0 1K0 3C28 FC39 FC38 FC36 100R 3C39 IC18 FC20 3C80 4K7 1K0 3C59 5 1 3 4 2 8 7 6 FC25 7C12 SN74LVC2G53DCU 100K 3C43 4C02 3C61 10K 2C31 100n 30R 5C01 BC847BW 7C06 1n0 2C02 100R 3C14 30R 5C11 3C13 100R 3C03 100n 2C36 33R 2C07 FC34 3V3_SW 1n0 FC05 3 6 3C19 3 10K 3C...

Страница 48: ...B15 A4N C13 A4P D13 A5N C14 A5P 7A01 8 MT5382 A0N A11 A0P B11 A1N A12 A1P 3D47 FD79 FD86 22R 3D40 ID01 FD08 BZX384 C6V8 6D08 1K0 3D56 FD84 FD69 FD24 7D03 PDTC114ET 2D22 10p 30R 5D03 2D24 10p 5V_SW FD35 4D07 FD56 4D03 FD30 3V3_LVDS 4D10 FD92 4D06 3 1D12 DLW21S 1 2 4 FD28 FD61 FD62 4D08 3 1D39 DLW21S 1 2 4 FD31 ID04 3V3_SW 4D11 FD34 FD15 100n 2D06 22R 3D38 5D07 30R FD55 FD57 8 9 42 43 44 45 46 47 48...

Страница 49: ...MN6 3504 3E02 47K 10K 3E99 47K 3E39 100R 3E22 1V8HDMI_AMUX 4E02 FE57 FE39 100R 3E66 5VHDMI_3 FE37 3E37 10K 3E53 47K 36 43 4 3 1 2 30 29 28 44 42 41 40 39 38 37 16 15 14 13 12 35 34 33 32 31 11 10 9 8 7 6 5 19 18 17 21 20 27 26 25 24 23 22 Φ 7E23 WT61P7 RG440WT 100n 2E01 5VHDMI_SIDE 3E19 100R 75 78 77 7 8 4 5 1 2 10 11 65 64 68 67 59 58 13 32 52 72 42 41 45 44 48 47 39 38 62 61 15 14 22 21 25 24 28...

Страница 50: ... 1F04 2 3 4 FF14 1V1_RGBADC 33p 2F91 1F04 3 5 6 YKC21 6040N RED IF43 S414 IF38 3401 100R 2438 1V1_RGBADC 10n 5F09 30R 6F20 PESD5V0S1BA 3F15 3F71 27R 3F40 10K 6F05 PESD5V0S1BA 3V3_DAC 2F18 1n0 2F92 100p 5F21 60R 2404 47p 2F27 100n 2F77 2435 1n0 47n 1u0 2447 3F82 15K 3V3_SW 3F80 2V5_VFE FF46 3F58 27R 6F10 PESD5V0S1BA FF38 5F25 30R 2F25 4u7 22K 3F46 47p 2F85 470n 2F09 100p 2F87 F446 FF20 100n 2F19 3F...

Страница 51: ... 1 SFDO 2P89 3V3_SW 100n 3P14 1V2 FP06 3V3_SW 4K7 30R 2P05 100n 5P14 10n 2P33 10K 3P29 2P20 100n 3V3_SW 100n 1u0 2P78 2P26 100R 3P31 3P12 4K7 3V3_SW FP24 2P18 1u0 100n 2P08 E2 J3 J9 J11 FP03 P12 R1 C3 R4 T3 W6 Y2 Y5 AA1 D1 D4 L14 M9 B5 M11 M12 M14 N10 N13 P2 P9 P11 Y20 A4 J12 K1 K4 K10 K13 L9 L11 L12 C6 D7 F3 G1 G4 H2 M1 C8 D9 W7 W19 A1 M4 N3 U2 V1 V4 W3 AA4 AB3 B2 P10 P13 P14 J13 J14 K9 K11 K12 K...

Страница 52: ...8 D2 D8 E7 F2 F8 C9 E9 G1 G3 G7 J2 A3 E3 J3 N1 E1 J9 M9 R1 J1 A9 G9 C1 C3 C7 L1 R3 R7 R8 K9 K7 B3 B7 A8 A1 H9 F1 F9 C8 C2 F3 F7 E8 A2 E2 G8 G2 D7 D3 D1 D9 B1 B9 H7 H3 H1 N7 P2 P8 P3 L2 L3 L7 J8 K2 K8 L8 M8 M3 M2 P7 R2 M7 N2 N8 N3 7Q01 EDE2516ACSE 6E E SDRAM Φ 4Q01 22R 3Q03 3Q05 22R 100n 2Q35 100n 2Q41 100n 2Q32 2Q19 100u 16V 100n 2Q30 2Q51 100n 2Q50 100n 2Q01 100n 100R 3Q06 2Q42 100n 100n 2Q38 2Q3...

Страница 53: ...SW 0R05 3R50 3 30R 5R03 2R23 10n 2R19 10n 100n 2R28 0R05 3R54 1 0R05 3R51 3 3 6 2R04 10n 1 8 3V3_SW 3R49 1 0R05 AB8 AA9 AB9 AA10 AB10 AA12 AB12 AA13 AB13 AA11 AB11 AB15 AA16 AB16 AA18 AB18 AA19 AB19 AA17 AB17 AA8 W8 Y12 Y13 W9 W10 W11 AA7 AB7 AA14 AB14 AA15 MT8280 7P01 4 Y8 Y14 Y15 Y9 Y10 Y11 Φ LVDS_RX 2R25 100n 3V3_SW FR08 2R14 100n 3 6 0R05 3R53 3 0R05 3R54 4 4 5 1u0 2R06 2R02 1u0 E21 E22 G21 G2...

Страница 54: ...p A6 IO_A7 LVDS20n A7 IO_A8 A8 IO_A10 LVDS23p A10 IO_A11 A11 IO_A12 LVDS25p A12 BANK2 Φ 7K01 3 EP2C5F256C7N 3V3_SW 100n 3V3_FPGA 2K23 100n 2K21 1n0 2K28 33R 3K29 100n 2K04 4K02 2K20 100n 3K20 33R 33R 3K24 FK14 5K07 30R FK03 30R 5K08 33R 3K32 1V2 33R 3K34 100n 2K08 1 2 3 4 5 6 1735446 6 1K03 2K09 100n G14 K14 R16 M10 M7 P10 P7 T15 T2 G3 K3 R1 A15 A2 C10 C7 E10 E7 B16 D12 F12 M5 E12 L6 F11 G9 H10 H7...

Страница 55: ...L06 E14 3L09 F6 3L06 2 F12 3L13 B9 3L05 2 E12 3L07 2 H11 3L06 4 F12 5L11 C2 7L02 C8 NC 2L13 E5 7 2L15 E7 3L14 B9 2L17 F5 6 A 5L10 E6 2 3L07 4 H11 9 3L10 C13 11 13 1V1_CD 1V1_CD 3V3_DCD 3V3_ACD 1V1_CD 25M0 1L01 IL03 3V3_ACD 47R 1 8 3L06 1 3V3_DCD FL02 2L11 10n 3V3_SW FL04 IL06 IL02 100n 2L26 100n 2L07 10u 2L14 10n 2L40 IL01 1 3V3_DCD 4K7 3L13 IL05 2L17 18p 30R 5L10 3V3_DCD 1V1_CD 2 7 3V3_DCD 3L05 2...

Страница 56: ...M03 IM02 FM29 2M27 10n 68R 3M25 2M21 10n 22R 3M23 10n 2M26 3M31 100R 8 9 22 23 24 25 26 27 28 29 17 18 19 2 20 21 3 4 5 6 7 1 10 11 12 13 14 15 16 1M01 FI RE21S VF R1300 10n 2M28 3M33 100R 30R 5M04 2M11 100n 5M03 30R FM02 3V3_SW 3M18 10K 5 6 7 8 9 11 12 BM10B SRSS TBT 1 10 2 3 4 1M02 100n 2M02 2M06 100n FM01 47R 3M10 FM11 FM14 100n 2M03 22R 3M08 22R 3M09 68R 3M27 10n 2M18 T14 T16 T3 T5 T7 L11 L6 L...

Страница 57: ...hat are not used in multiple schematics but only once or several times in the same schematic are included in the SRP reference list but only with one reference Additional Tip When using the PDF service manual file you can very easily search for signal names and follow the signal over all the schematics In Adobe PDF reader Select the signal name you want to search for with the Select text tool Copy...

Страница 58: ... LVDS_TXo1n B6K 2x LVDS_TXo1n_FPGA B6K 1x LVDS_TXo1p B4D 5x LVDS_TXo1p B5R 2x LVDS_TXo1p B6K 2x LVDS_TXo1p_FPGA B6K 1x LVDS_TXo2n B4D 5x LVDS_TXo2n B5R 2x LVDS_TXo2n B6K 2x LVDS_TXo2n_FPGA B6K 1x LVDS_TXo2p B4D 5x LVDS_TXo2p B5R 2x LVDS_TXo2p B6K 2x LVDS_TXo2p_FPGA B6K 1x LVDS_TXo3n B4D 5x LVDS_TXo3n B5R 2x LVDS_TXo3n B6K 2x LVDS_TXo3n_FPGA B6K 1x LVDS_TXo3p B4D 5x LVDS_TXo3p B5R 2x LVDS_TXo3p B6K...

Страница 59: ...C2 2Q58 C2 2Q59 C2 2Q60 C2 2Q61 C2 2Q62 C2 2Q63 C2 2Q64 C2 2Q65 C2 2R01 A3 2R16 B1 2R17 B1 3109 E2 3110 D2 3116 D2 3119 D2 3167 E1 3168 E1 3169 E1 3170 E1 3171 C3 3209 A6 3226 A6 3227 A6 3301 F1 3302 F1 3303 F3 3304 F3 3306 F3 3307 F3 3308 F3 3311 F3 3313 F3 3319 F3 3326 F3 3332 D5 3333 D5 3334 D5 3335 D5 3337 F3 3338 F3 3342 F3 3343 F3 3344 D5 3345 D5 3346 C5 3347 C5 3348 D5 3504 F3 3505 F3 3507 ...

Страница 60: ...60 LC8 1U LA 7 Circuit Diagrams and PWB Layouts Layout Small Signal Board Part 1 Top Side Part 1 H_17740_016a eps 220108 ...

Страница 61: ...Circuit Diagrams and PWB Layouts 61 LC8 1U LA 7 Layout Small Signal Board Part 2 Top Side Part 2 H_17740_016b eps 220108 ...

Страница 62: ...62 LC8 1U LA 7 Circuit Diagrams and PWB Layouts Layout Small Signal Board Part 3 Top Side Part 3 H_17740_016c eps 220108 ...

Страница 63: ...Circuit Diagrams and PWB Layouts 63 LC8 1U LA 7 Layout Small Signal Board Part 4 Top Side Part 4 H_17740_016d eps 220108 ...

Страница 64: ...3 D7 3114 D7 3115 D7 3117 E8 3118 D7 3120 D7 3121 E8 3122 D7 3123 D8 3124 D8 3125 D7 3126 D7 3127 D7 3128 D7 3129 E8 3130 E8 3131 D7 3132 D7 3133 E8 3134 D7 3135 D7 3136 D7 3137 E8 3138 D7 3139 D8 3140 D7 3141 D7 3142 D7 3143 D7 3144 D7 3145 D7 3146 D7 3147 D8 3148 D8 3149 D7 3150 D7 3151 D8 3152 D7 3153 E8 3154 E8 3155 D7 3156 D7 3157 D7 3158 E8 3159 C6 3160 C6 3161 C6 3162 D8 3163 D8 3164 D8 316...

Страница 65: ...Circuit Diagrams and PWB Layouts 65 LC8 1U LA 7 Layout Small Signal Board Part 1 Bottom Side Part 1 ...

Страница 66: ...66 LC8 1U LA 7 Circuit Diagrams and PWB Layouts Layout Small Signal Board Part 2 Bottom Side Part 2 H_17740_017b eps 220108 ...

Страница 67: ...Circuit Diagrams and PWB Layouts 67 LC8 1U LA 7 Layout Small Signal Board Part 3 Bottom Side Part 3 ...

Страница 68: ...68 LC8 1U LA 7 Circuit Diagrams and PWB Layouts Layout Small Signal Board Part 4 Bottom Side Part 4 H_17740_017d eps 220108 ...

Страница 69: ...Circuit Diagrams and PWB Layouts 69 LC8 1U LA 7 Keyboard Control Panel I_17441_001 eps 240408 3139 128 7976 1 E E Keyboard Control Panel I_17441_003 eps 240408 3139 138 7009 1 E E ...

Страница 70: ...70 LC8 1U LA 7 Circuit Diagrams and PWB Layouts Layout Keyboard Control Panel I_17441_002 eps 240408 3139 128 7976 1 ...

Страница 71: ...Circuit Diagrams and PWB Layouts 71 LC8 1U LA 7 Layout Keyboard Control Panel I_17441_004 eps 240408 3139 138 7009 1 ...

Страница 72: ... 3P16 D4 3P17 E5 4 5 6 C 3P22 E8 150K D E A 1P09 A1 1P10 B1 3P21 7P13 BC847BW 3P28 10K 10K 3P27 IP18 7P11 BC847BW FP18 FP11 4P02 4P01 6P12 2 VS TSML1020 GP1UE260RKVF GND 3 4 5 1 OUT IP14 7P14 5V_SW 3P22 10K 100R 3P16 3P07 680R IP22 680R 3P08 3P12 270R 3P17 100R 5 6 7 8 9 10 11 BM09B SRSS TBT 1 2 3 4 3P15 10K 1P10 IP11 3V3STBY 5V_SW IP17 10u 2P13 FP13 FP10 3V3STBY IP15 2P12 10u 6K8 3P19 2P10 10u 3P...

Страница 73: ...12 A6 3P13 A6 3P14 A2 3P15 A2 3P16 A4 3P17 A5 3P18 A6 3P19 A4 3P20 A6 3P21 A6 3P22 A6 3P23 A4 3P24 A6 3P25 A6 3P26 A6 3P27 A2 3P28 A3 4P01 A2 4P02 A2 6P10 A3 6P11 A3 6P12 A5 7P10 A2 7P11 A2 7P12 A5 7P13 A6 7P14 A4 3139 123 6327 3 H_17650_054 eps 140108 3139 123 6327 3 H_17650_055 eps 140108 1P09 A4 1P10 A5 1P11 A1 1P12 A1 1P13 A1 Personal Notes E_06532_012 eps 131004 ...

Страница 74: ...74 LC8 1U LA 7 Circuit Diagrams and PWB Layouts Personal Notes E_06532_013 eps 131004 ...

Страница 75: ...ff DNR to Off White Tone Alignment Activate SAM Select RGB Align Use a 75 white screen Fluke 54200 or Flat73 Quantum Data 802BT as input signal and set the following values All R G B Gain values initial to 128 maximum All R G B Offset values blacklevel to 0 In case you have a color analyzer Measure with a calibrated phosphor independent color analyzer e g Minolta CA 210 in the centre of the screen...

Страница 76: ... values of each Option Byte OP will give the option code Table 8 3 Option code overview CTN Model nr Option Code Display Code 32PFL3403D 85 065 123 094 248 006 106 000 000 000 004 LC320WXN 136 32PFL5403D 27 065 123 094 248 006 106 000 000 000 004 LC320WXN 136 32PFL5413D 85 065 123 094 248 006 106 000 000 000 004 LC320WXN 136 42MF438B 27 064 091 086 248 006 002 000 000 000 002 LC420WUE 130 42PFL340...

Страница 77: ...HT_DIMMING ON Backlight Dimming is available OFF Backlight Dimming is not available Bit 2 4 Reserved Not Used Reserved Bit 1 2 OPC_BBD ON Black Bar Detection is available OFF Black Bar Detection is not available Bit 0 LSB 1 OPC_WIDE_SCREEN ON TV is 16x9 set OFF TV is 4x3 set Provision Byte OP3 Bit 7 MSB 128 OPC_HDMI_EASY ON HDMI Easy is available Provision OFF HDMI Easy is not available Provision ...

Страница 78: ...SB 128 Reserved Not Used Reserved Bit 6 64 Reserved Not Used Reserved Bit 5 32 Reserved Not Used Reserved Bit 4 16 Reserved Not Used Reserved Bit 3 8 Reserved Not Used Reserved Bit 2 4 Reserved Not Used Reserved Bit 1 2 Reserved Not Used Reserved Bit 0 LSB 1 Reserved Not Used Reserved Byte OP8 Bit 7 MSB 128 Reserved Not Used Reserved Bit 6 64 Reserved Not Used Reserved Bit 5 32 Reserved Not Used R...

Страница 79: ...dio video processing Motion estimation compensation engine MT8280 in some sets FPGA I2 C output to AmbiLight modules in some sets HDMI demultiplexer SIL9185 for driving 4 HDMI connectors Standby controller WT61P7 for overall power management Analog IF PLL demodulator TDA9886 Audio class D amplifier TDA8932 9 1 1 Features Hybrid NTSC ATSC tuner 3 1 HDMI v1 3 supporting CEC USB 2 0 Digital Natural M...

Страница 80: ... to SSB 24 V to Bolt on Supply where applicable to SSB 9 3 DC DC converters On board DC DC converters convert the 12 V coming from the PSU and deliver the following voltages 5 V 5Vtuner 5 V 5V_SW 3 3 V 3V3_SW 2 5 V 2V5 1 8 V 1V8_SW 1 1 V 1V1_SW 1 2 V 1V2 The power supply system consists on standby switched and regulated voltages The Standby voltage 3V3STBY will be available once AC supply is provi...

Страница 81: ...ignal from the tuner is processed directly by the MT5382 Main Processor In future ITV implementations the MT5112 Channel Decoder and ProIdiom MPEG2 decoder encoder will be added not implemented in this chassis Refer to figure Front end implementation for details Figure 9 4 Front end implementation DC DC NCP5422ADR26 BD25KA5WFP E2 DC DC NCP5422ADR26 TPS74801DRCR L78M05DCT provision 5Vtuner 3V3STBY ...

Страница 82: ...via an LVDS connector Refer to figure Video processing basic sets for details Figure 9 5 Video processing basic sets In sets which support DNM AmbiLight the signal coming from the MT5382 audio video processor is fed to the MT8280 motion engine with double frame rate output 120 Hz Refer to diagram B5R and figure Video processing DNM AmbiLight using MT8280 Motion Engine for details Figure 9 6 Video ...

Страница 83: ...or the audio processing inside the audio video processor refer to figure Functional blocks audio processing MT5382 audio video processor for details Figure 9 7 Functional blocks audio processing MT5382 audio video processing For the implementation of the MT5382 audio video processor for audio processing refer to figure Audio processing Figure 9 8 Audio processing H_17740_050 eps 250108 H_17740_051...

Страница 84: ...tails Figure 9 9 HDMI implementation Note if on one of the HDMI inputs a DVI signal is connected the analog audio inputs near the HDMI3 connector are automatically selected as audio input source 9 8 AmbiLight when present The AmbiLight units are located in the back cover Refer to figure AmbiLight implementation for details Figure 9 10 AmbiLight implementation For the connector pin assignments refe...

Страница 85: ...tion List and IC Data Sheets EN 85 LC8 1U LA 9 9 9 Control Signal Description The following diagram gives an overview of the control signal flow for the LC08SP platform Figure 9 11 Control Signal flow diagram H_17740_054 eps 250108 ...

Страница 86: ...put MT8280 Power Down Mode MT5382 B18 GPIO11 INT0 GPIO11 Input Interrupt from MT8280 MT5382 A18 GPIO12 8280_DETECT GPIO12 Input MT8280 Detection MT5382 B17 GPIO13 ANA DIG_AUD_SELECT GPIO13 Output Gain Selection to Pre Amp Reserved MT5382 AE1 OWRP2 EDID_WE GPIO39 Output WE for EDID EEPROMs MT5382 U23 VCXO UART_SELECT GPIO67 Output Service UART Selector Reserved MT5382 C11 PAALE HDMI_HPD_2 GPIO23 Ou...

Страница 87: ... speaker output to send the system into protection in order to protect the audio amplifier and speakers HEADPHONE_DETECT The HEADPHONE_DETECT signal is used to detect the presence of a headphone connection to the Side AV headphone socket When a headphone connection is detected the speaker output should be muted MUTEn The MUTEn signal is used as the mute control to the TDA8932BT class D audio ampli...

Страница 88: ...sed for resetting the HDMI source connected to HDMI3 during the hot plug process HDMI_HPD_SIDE The HDMI_HPD_Side signal is used for resetting the HDMI source connected to Side HDMI during the hot plug process INT_CEC The INT_CEC signal is the interrupt signal from WT61P7 to MT5382 for event notification On the MT5382 an interrupt port is used to receive the notification 9 9 5 USB Control Signals U...

Страница 89: ... Tool special European remote control designed for service technicians DTS Digital Theatre Sound DVB T Digital Video Broadcast An MPEG2 based standard for transmitting digital audio and video T Terrestrial DVD Digital Versatile Disc DVI Digital Visual Interface DW Double Window ED Enhanced Definition 480p 576p EDID Extended Display Identification Data VESA standard EEPROM Electrically Erasable and...

Страница 90: ...iver RF Radio Frequency RGB Red Green and Blue The primary color signals for TV By mixing levels of R G and B all colors Y C are reproduced RGBHV Red Green Blue Horizontal sync and Vertical sync ROM Read Only Memory SAM Service Alignment Mode SC SandCastle two level pulse derived from sync signals SC1 OUT SCART output of the MSP audio IC SC2 OUT SCART output of the MSP audio IC S C Short Circuit S...

Страница 91: ... intercarrier output CAGC AGND VP VIF1 VIF AGC RC VCO DIGITAL VCO CONTROL AFC DETECTOR VIDEO TRAPS 4 5 to 6 5 MHz NARROW BAND FM PLL DETECTOR I2C BUS TRANSCEIVER VIF PLL SINGLE REFERENCE QSS MIXER INTERCARRIER MIXER AND AM DEMODULATOR SIF AGC SUPPLY 1 2 14 16 19 15 21 17 8 6 5 4 12 7 11 10 18 20 23 24 OUTPUT PORTS MAD AUDIO PROCESSING AND SWITCHES 9 TUNER AGC CAGC neg 3 22 crystal and MAD select T...

Страница 92: ...R 5 V MODE VDDA 15 14 IN1P V O I C S O F E R C S O DDA VSSD IN1N INREF IN2P IN2N 6 POWERUP 4 DIAG 7 CGND 21 20 22 23 BOOT2 VDDP2 OUT2 25 STAB1 24 STAB2 18 11 DREF HVPREF 30 HVP1 19 HVP2 VSSP2 DRIVER HIGH DRIVER LOW VDDA VSSP1 VSSP2 VSSD VDDA VSSA HALF SUPPLY VOLTAGE 5 ENGAGE 13 9 TEST VSSA 1 16 17 32 VSSD HW TDA8932T VSSD HW VSSD HW O I C S O P 1 N I 1 P V H N 1 N I V G A I D DDP1 1 T O O B E G A ...

Страница 93: ...viation List and IC Data Sheets EN 93 LC8 1U LA 9 9 11 3 Diagram B4 Type MT5382 IC7A01 Audio Video Processor Figure 9 14 Internal block diagram and pin configuration Block Diagram Pin Configuration MT5382 H_17740_055 eps 250108 ...

Страница 94: ...ircuit Descriptions Abbreviation List and IC Data Sheets EN 94 LC8 1U LA 9 9 11 4 Diagram B4E Type SIL9185 IC7E18 HDMI Multiplexer Figure 9 15 Internal block diagram Block Diagram H_17370_074 eps 100807 ...

Страница 95: ...413D 85 42MF438B 27 42PFL3403D 27 42PFL3603D 27 42PFL5403D 85 42TA648BX 37 47PFL3603D 27 47TA648BX 37 52MF438B 27 52PFL3603D 27 52PFL5603D 27 All chapters Some textual improvements Chapter 1 Improved connection overview drawing Chapter 4 Highlighted the importance of the cable tapes Chapter 5 Info added on how to copy NVM data to and from USB stick Chapter 7 Diagrams B7L and B7M indicated as Reser...

Страница 96: ...www s manuals com ...

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