Circuit Diagrams and PWB Layouts
55
LC8.1U LA
7.
SSB: ITV-Channel Decoder (Reserved)
AVSS2
AVDD4
AVSS4
XTAL 1
XTAL 2
AVSS6
AVSS3
AVDD6
AVDD3
AVDD7
AVDD1.6
AVSS7
REFTOP
VCMEXT
REFBOT
AVSS
NC
AVDD1
IN+
IN-
AVDD8
AVSS8
NV
NC
ADVDD3.3
NC
NC
AV
D
D
2
NC
NC
NC
AV
SS
9
NC
NC
AV
D
D
9
AV
SS
5
AV
D
D
5
NC
NC
AV
D
D
3
.3
DGND
3
.3
VDD
3
.3
VDD1.6
DGND1.6
NC
GPIO0
T
S
DA
T
A
7
T
S
DA
T
A
6
T
S
DA
T
A
5
T
S
DA
T
A
4
VDD3.3
DGND3.3
TSDATA3
TSDATA2
VDD1.6
DGND1.6
TSDATA1
TSDATA0
TSSYNC
VDD3.3
DGND3.3
TSCLK
TSVAL
TSERR
VDD1.6
DGND1.6
VDD3.3
DGND3.3
HOST_DATA
VDD1.6
DGND1.6
HOST_CLK
RESET
GPIO1
NC
VDD1.6
DGND1.6
RF_A
GC
IF_A
GC
DGMD
3
.3
VDD
3
.3
TUNER_CLK
TUNER_D
A
T
A
S
A1
S
A0
DGND1.6
VDD1.6
DGND1.6
ANT_TX
DGND
3
.3
VDD
3
.3
ANT_RX
ANT_DET
GPIO
3
DGND1.6
VDD1.6
GPIO2
NC
VDD
3
.3
DGND
3
.3
+3V3_ACD
3L11
22R
2L33 E6
3L12 D13
2L39 D6
IL01 D6
3L04 B6
G
10
FL02 B3
IL05 F7
NC
NC
NC
NC
FL04 G9
FL01 A3
2L22 B3
2L19 B2
FL03 C3
NC
E
FROM FLASH
NC
RES
G
NC
2L04 D2
2L05 D2
NC
F
NC
2L11 D7
1
9
6
NC
11
2L14 E6
3
7
F
13
2L16 D6
3
10
12
2L21 B3
H
5
2L34 B6
2L01 B2
2L40 D7
TO/FROM TUNER
B
H
14
5
2L06 D3
RES
8
D
2L08 D3
3L07-1 H11
NC
D
B
NC
1
2L12 D5
12
4L02 B6
2L25 C2
4
2L18 F5
2L02 C2
2L20 B2
8
2L23 B3
NC
14
2L09 D3
NC
4
2L24 B3
IL02 E6
IL03 E6
NC
3L07-3 H11
5L05 C6
2L26 C2
4L01 B6
5L07 B2
3L05-4 E12
5L04 D6
2L27 C3
A
C
2
3L05-1 E12
C
3L05-3 E12
2L03 C2
2L07 D3
3L06-3 F12
NC
1L01 F6
5L06 A2
E
TO PROIDIOM
2L10 D3
3L06-1 E12
HOTEL TV - CHANNEL DECODER
(RESERVED)
3L11 C13
IL04 F7
IL06 E14
3L09 F6
3L06-2 F12
3L13 B9
3L05-2 E12
3L07-2 H11
3L06-4 F12
5L11 C2
7L02 C8
NC
2L13 E5
7
2L15 E7
3L14 B9
2L17 F5
6
A
5L10 E6
2
3L07-4 H11
9
3L10 C13
11
13
+1V1_CD
+1V1_CD
+
3
V
3
_DCD
+
3
V
3
_A
CD
+1V1_CD
25M0
1L01
IL03
+3V3_ACD
47R
1
8
3L06-1
+
3
V
3
_DCD
FL02
2L11
10n
+3V3_SW
FL04
IL06
IL02
100n
2L26
100n
2L07
10u
2L14
10n
2L40
IL01
1
%
+
3
V
3
_DCD
4K7
3
L1
3
IL05
2L17
18p
30R
5L10
+3V3_DCD
+1V1_CD
2
7
+
3
V
3
_DCD
3L05-2
47R
3
6
+3V3_ACD
47R
3
L07-
3
10
u
2L19
10n
2L39
100n
2L06
5L11 30R
100n
4L01
96
97
98
99
2L22
81
82
83
84
85
86
87
88
89
9
90
91
92
93
94
95
68
69
7
70
71
72
73
74
75
76
77
78
79
8
80
53
54
55
56
57
58
59
6
60
61
62
63
64
65
66
67
4
40
41
42
43
44
45
46
47
48
49
5
50
51
52
25
26
27
28
29
3
30
31
32
33
34
35
36
37
38
39
11
12
13
14
15
16
17
18
19
2
20
21
22
23
24
7L02
MT5112BD-L
1
10
100
2
7 47R
3L06-2
+1V1_CD
4L02
5 47R
3L06-4 4
16V
+1V2
100u
2L01
2L2
3
100n
2L25
10
u
100n
+3V3_SW
2L20
100n
2L33
100n
2L13
100n
2L10
10u
5L07
2L18
18p
2L
3
4
4n7
47R
3L05-1 1
8
16V
100u
2L03
3L05-4
47R
4
5
IL04
1
8
+3V3_DCD
47R
3
L07-1
+
3
V
3
_A
CD
100R
3L10
+
3
V
3
_DCD
100n
2L0
8
47R
3L05-3 3
6
2L16
100n
2L24
100n
2L12
100n
+1V1_CD
+3V3_DCD
1
%
3
L14
4K7
100n
2L09
FL01
100n
2L21
+1V1_CD
22R
5L04
10u
3L12
3L06-3
47R
3
6
+1V1_CD
5L06 30R
FL03
+3V3_DCD
2L02
100u
5L05
30R
16V
3
L07-2
47R
27
2L05
100n
3L04
10K
2L27
100n
100n
2L04
3
L07-4
47R
45
+
3
V
3
_DCD
100n
2L15
3L09
1M0
TUN_FE_ERR
TUN_FE_DATA(7)
TUN_FE_DATA(6)
TUN_FE_DATA(5)
TUN_FE_DATA(4)
TUN_FE_SOP
TUN_FE_DATA(0)
TUN_FE_CLK
TUN_FE_DATA(3)
TUN_FE_DATA(2)
TUN_FE_DATA(1)
SCL
CHDEC_RESET
SDA
TUN_FE_VALID
FATIN+
FATIN-
TUNER_SCL
TUNER_SDA
IF_AGC_ChDec
B7L
B7L
H_17740_014.eps
210108
3139 123 6359.2
Содержание 32PFL3403D/85
Страница 65: ...Circuit Diagrams and PWB Layouts 65 LC8 1U LA 7 Layout Small Signal Board Part 1 Bottom Side Part 1 ...
Страница 67: ...Circuit Diagrams and PWB Layouts 67 LC8 1U LA 7 Layout Small Signal Board Part 3 Bottom Side Part 3 ...
Страница 74: ...74 LC8 1U LA 7 Circuit Diagrams and PWB Layouts Personal Notes E_06532_013 eps 131004 ...
Страница 96: ...www s manuals com ...