54
LC8.1U LA
7.
Circuit Diagrams and PWB Layouts
SSB: FPGA-AmbiLight
CLK
MSEL
6
5
4
3
2
1
0
7
DATA0
DCLK
TDI
TDO
TMS
TCK
1
0
CONF_DONE
CONFIG
STATUS
CE
VCCA_PLL
VCCD_PLL
GNDA_PLL
GND
GND
GND
VCCIO4
VCCINT
1
2
1
2
2
1
GND_PLL2
GND_PLL1
VCCIO3
VCCIO2
VCCIO1
DATA
GND
ASDI
DCLK
CS_
VCC
NC
NC
NC
FOR PROGRAMMING FPGA
RE
S
NC
F
G
H
I
J
A
B
C
D
E
F
G
H
I
J
1K01 B9
1K02 B14
1K03 C12
1K04 C14
1K05 G6
2K01 B2
2K02 A2
2K03 A2
2K04 A3
1
2
5K01
3
4
5
6
7
8
9
NC
NC
10
11
12
13
14
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A
B
C
D
E
2K05 A3
2K06 B2
2K07 B2
2K08 B2
2K09 B3
2K10 B3
2K11 B3
2K12 B4
2K13 B4
2K14 B4
2K15 D3
2K17 C2
2K18 C2
2K19 C2
2K20 C3
2K21 C3
2K22 D2
2K23 D2
2K24 D3
2K25 E2
2K26 E2
2K27 B6
2K28 B7
2K29 B10
2K30 H7
FK28
2K31 I7
2K32 G6
3K01 B6
3K02 B6
3K03 B6
3K04 B7
3K05 A12
3K06 A12
3K07 B12
3K08 B12
3K09 B12
3K10 B12
3K11 B12
3K12 G7
3K13 H7
3K14 I7
3K16 G10
3K17 G10
3K18 G11
3K19 G9
3K20 D7
3K21 E7
3K22 E7
3K23 E7
RE
S
NC
3K24 E7
3K25 E7
3K26 E7
3K27 E7
3K28 E7
3K29 E7
3K30 F7
3K31 F7
3K32 D10
3K33 E10
3K34 E10
3K35 E10
3K36 E10
3K37 E10
3K38 E10
3K39 E10
3K40 H7
3K41 H7
3K42 H7
3K43 H7
4K01 B7
4K02 B7
4K03 B7
4K04 B7
NC
4K05 B8
4K06 B8
4K31 G11
4K32 H11
5K01 A1
5K02 B1
5K03 C1
5K04 D1
5K05 E1
5K07 B8
5K08 A10
5K09 G7
7K01-1 G8
7K01-2 I8
7K01-3 F13
7K01-4 H13
7K01-5 D8
7K01-6 F3
7K01-7 E13
7K02 B10
FK01 A2
FK02 B2
FK03 C2
FK04 D2
FK05 E2
FK06 B9
FK07 B9
FROM LVDS
NC
NC
NC
FK08 B9
FK09 B9
FK10 B9
FK11 B9
FK12 B13
FK13 B13
FK14 B13
FK15 B13
FK16 B13
FK17 B13
FK18 G8
FK19 B12
FK20 B12
FK21 B12
FK22 B12
FK23 H9
FK24 H9
FK25 H8
FK26 H8
FK27 H9
FK28 J9
RE
S
RES
AMBILIGHT
RE
S
(FOR DEVELOPMENT)
IK01 G6
IK02 G9
PSU
RES
FROM PSU TO AMBILIGHT
INPUT BANK
FROM FLASH
SOFTWARE DEBUGGER
FROM LVDS
TO DRIVE AMBILIGHT DRIVERS
NC
FPGA - AMBILIGHT
NC
RES
2K19
100n
100R
3K09
2K31
3K14
22R
4K05
100n
2K13
FK22
1
2
3
4
5
6
7
8
1K02
B6B-PH-SM4-TBT(LF)
+3V3_FPGA
3K38
+3V3_FPGA
33R
+2V5_FPGAin
3K43
3K17
10K
33R
47R
3K12
10K
3K19
33R
3K23
2K29
10n
IK01
FK21
FK09
2K06
4u7
100n
2K11
3K39
GND_24V
+3V3_FPGA
33R
3K02
100R
FK04
30R
+2V5_FPGAin
5K04
4K04
33R
3K21
100R
3K10
3K11
4K01
+24V_BOLT-ON
100R
1K04
1735446-4
1
2
3
4
+2V5
30R
5K09
100R
3K01
33R
3K25
100n
2K24
N2
IO_P1|LVDS0 p
P1
IO_P2|LVDS0 n
P2
IO_P3
P3
L2
IO_L3
L3
IO_L4|PLL1_OUTp
L4
IO_M1
M1
IO_M2
M2
IO_M3
M3
IO_M4|PLL1_OUTn
M4
IO_N1|LVDS1 p
N1
IO_N2|LVDS1 n
F3
IO_F4|CSO_
F4
IO_J4|VREFB1N1
J4
IO_K1|LVDS4 n
K1
IO_K2|LVDS4 p
K2
IO_K4|LVDS3 p
K4
IO_K5|LVDS3 n
K5
IO_L1|LVDS2p
L1
IO_L2|LVDS2n
D3
IO_D4|LVDS6 n
D4
IO_D5|LVDS8p
D5
E1
IO_E1|LVDS5 p
E2
IO_E2|LVDS5 n
IO_E3|LVDS7p
E3
IO_E4|LVDS7n
E4
IO_E5|LVDS8n
E5
IO_F3|VREFB1N0
IO_C1|LVDS9p
C1
IO_C2|LVDS9n
C2
IO_C3|ASDO
C3
IO_D3|LVDS6 p
+3V3_FPGA
Φ
BANK1
EP2C5F256C7N
7K01-2
2K18
100n
2K32
10u
IO_F6|LVDS13n
F6
IO_F7|LVDS19n
F7
IO_F8|LVDS19p
F8
IO_F9|LVDS12p
F9
IO_G10|LVDS24n
G10
IO_G11|LVDS24p
G11
IO_G6|LVDS11n
G6
IO_G7|LVDS11p
G7
IO_C5|LVDS10n
C5
IO_C6|LVDS17p
C6
IO_D10|LVDS22p
D10
IO_D11|LVDS22n
D11
IO_D6|LVDS17n
D6
IO_D8|VREFB2N1
D8
IO_E6|LVDS13p
E6
IO_F10|LVDS12n
F10
IO_B5|LVDS16n
B5
IO_B6|LVDS18n
B6
IO_B7|LVDS20p
B7
IO_B9|LVDS21p
B9
IO_C11|VREFB2N0
C11
IO_C12|LVDS27p
C12
IO_C13|LVDS27n
C13
IO_C4|LVDS10p
C4
IO_A9|LVDS21n
A9
IO_B10|LVDS23n
B10
IO_B11
B11
IO_B12|LVDS25n
B12
IO_B13|LVDS26n
B13
IO_B14|LVDS28n
B14
IO_B3|LVDS14n
B3
IO_B4|LVDS15n
B4
IO_A13|LVDS26p
A13
IO_A14|LVDS28p
A14
IO_A3|LVDS14p
A3
IO_A4|LVDS15p
A4
IO_A5|LVDS16p
A5
IO_A6|LVDS18p
A6
IO_A7|LVDS20n
A7
IO_A8
A8
IO_A10|LVDS23p
A10
IO_A11
A11
IO_A12|LVDS25p
A12
BANK2
Φ
7K01-3
EP2C5F256C7N
+3V3_SW
100n
+3V3_FPGA
2K23
100n
2K21
1n0
2K28
33R
3K29
100n
2K04
4K02
2K20
100n
3K20
33R
33R
3K24
FK14
5K07
30R
FK03
30R
5K08
33R
3K32
+1V2
33R
3K34
100n
2K08
1
2
3
4
5
6
1735446-6
1K03
2K09
100n
G14
K14
R16
M10
M7
P10
P7
T15
T2
G3
K3
R1
A15
A2
C10
C7
E10
E7
B16
D12
F12
M5
E12
L6
F11
G9
H10
H7
J7
B1
B15
B2
C8
C9
E8
E9
G8
M6
E11
L5
N5
M8
A16
M9
P8
P9
R15
R2
T1
T16
A1
H14
H3
H8
H9
J14
J3
J8
J9
K9
EP2C5F256C7N
7K01-6
Φ
POWER
2K26
100n
3K42
K12
M13
F2
H5
G2
G1
33R
J1
H16
H15
J15
J16
J5
L13
F1
H4
J13
7K01-1
Φ
CONTROL
G5
H2
H1
J2
EP2C5F256C7N
FK20
3K35
33R
33R
3K30
+2V5_FPGAout
100n
4K31
2K10
33R
3K33
100n
+1V2_FPGA
2K14
100n
2K07
FK23
2K17
4u7
22u
6.3V
2K22
2K15
100n
1n0
2K30
DSO751SV
1K05
27M0
2
1
4
3
1u0
2K01
4K7
3K04
+3V3_FPGA
2
6
4
3
7
8
SCD
7K02
EPCS4SI8
5
1
Φ
5K03
30R
4K7
FK06
3K03
FK24
FK25
5K02
30R
3K08
100R
10K
3K18
FK27
+3V3_FPGA
33R
3K40
FK02
FK16
FK17
+2V5_FPGAout
+3V3_FPGA
4K0
3
D7
D9
E13
E15
+1V2_FPGA_PLL
K8
N3
N4
N6
N7
P6
R6
C16
D1
D2
F13
F14
F5
G4
H6
J10
J6
K13
K6
K7
C15
EP2C5F256C7N
Φ
NC
7K01-7
B8
FK26
FK13
FK07
FK08
33R
3K28
+1V2_FPGA
33R
3K41
2K02
100n
100n
2K05
1K0
3
K05
2K27
1n0
4u7
2K25
33R
3K37
33R
3K36
+1V2_FPGA_PLL
IK02
+3V3_FPGA
FK10
3K27
5K05
33R
+3V3_FPGA
30R
GND_24V
30R
4K06
10K
3K16
33R
3K31
IO_T3|LVDS58p
T3
IO_T4|LVDS56p
T4
IO_T5|LVDS55p
T5
IO_T6
T6
IO_T7|LVDS54p
T7
IO_T8|LVDS53p
T8
IO_T9|LVDS52p
T9
IO_R7|LVDS54n
R7
IO_R8|LVDS53n
R8
IO_R9|LVDS52n
R9
IO_T10|LVDS49n
T10
IO_T11|LVDS51p
T11
IO_T12|LVDS46p
T12
IO_T13|LVDS45p
T13
IO_T14|LVDS44p
T14
IO_R10|LVDS49 p
R10
IO_R11|LVDS51 n
R11
IO_R12|LVDS46 n
R12
IO_R13|LVDS45 n
R13
IO_R14|LVDS44 n
R14
IO_R3|LVDS58n
R3
IO_R4|LVDS56n
R4
IO_R5|LVDS55n
R5
IO_N11|VREFB4N0
N11
IO_N8|VREFB4N1
N8
IO_N9|LVDS59p
N9
IO_P11
P11
IO_P12|LVDS47p
P12
IO_P13|LVDS47n
P13
IO_P4|LVDS57n
P4
IO_P5|LVDS57p
P5
IO_L10|LVDS50n
L10
IO_L11|LVDS43n
L11
IO_L12
L12
IO_L7|LVDS60p
L7
IO_L8|LVDS60n
L8
IO_L9|LVDS50p
L9
IO_M11|LVDS43 p
M11
IO_N10|LVDS59n
N10
7K01-5
EP2C5F256C7N
IO_K10|LVDS48n
K10
IO_K11|LVDS48p
K11
IO_N13|LVDS41n
N14
IO_N14|LVDS41p
N15
IO_N15|LVDS39n
N16
IO_N16|LVDS39p
P14
IO_P14
P15
IO_P15|LVDS40n
P16
IO_P16|LVDS40p
BANK4
Φ
IO_L14
L15
IO_L15|LVDS37n
L16
IO_L16|LVDS37p
M12
IO_M12|LVDS42p
M14
IO_M14|VREFB3N1
M15
IO_M15|LVDS38n
M16
IO_M16|LVDS38p
N12
IO_N12|LVDS42n
N13
IO_G16|LVDS34n
H11
IO_H11|LVDS32p
H12
IO_H12|LVDS35n
H13
IO_H13|VREFB3N0
J11
IO_J11|LVDS32n
J12
IO_J12|LVDS35p
K15
IO_K15|LVDS36p
K16
IO_K16|LVDS36n
L14
IO_D16|LVDS30p
IO_E14|PLL2_OUTp
E14
E16
IO_E16
F15
IO_F15|LVDS33n
F16
IO_F16|LVDS33p
G12
IO_G12|LVDS31n
G13
IO_G13|LVDS31p
G15
IO_G15|LVDS34p
G16
Φ
BANK3
C14
IO_C14|LVDS29n
D13
IO_D13|LVDS29p
D14
IO_D14|PLL2_OUTn
D15
IO_D15|LVDS30n
D16
4
5
6
7
EP2C5F256C7N
7K01-4
1K01
1735446-7
1
2
3
FK11
3
K07
+3V3_SW
GND_24V
FK12
100n
2K12
3K22
2K03
33R
22R
100n
3K13
+3V3_FPGA
FK05
4K32
GND_24V
FK19
33R
3K26
3
K06
FK01
+3V3_FPGA
+3V3_FPGA
FK15
FK18
GND_24V
LVDS_A_TXo0n
I2S_SEL1
TMS_FPGA
AMBI_SCL
TCK_FPGA
TDI_FPGA
TDO_FPGA
DATA0
LVDS_A_TXo2n
LVDS_A_TXo2p
LVDS_A_TXo3n
LVDS_A_TXo3p
LVDS_A_TXo0p
LVDS_TXo2n
LVDS_TXo2p
LVDS_TXo1n
LVDS_TXo1p
LVDS_TXo0n
LVDS_TXo0p
LVDS_A_TXo1n
LVDS_A_TXo1p
LVDS_A_TXo4n
LVDS_A_TXo4p
LVDS_TXo3n
LVDS_TXo3p
LVDS_TXo4n
LVDS_TXo4p
TCK_FPGA
LVDS_A_TXoCLKp
LVDS_A_TXoCLKn
LVDS_TXoCLKp
LVDS_TXoCLKn
SDA
TDI_FPGA
I2S_SEL2
AMBI_SDA_OUT
AMBI_SCL_OUT
AMBI_SDA
nCSO
ASDO
FPGA_JTAG_TDI
FPGA_JTAG_TMS
FPGA_JTAG_TDO
FPGA_JTAG_TCK
TMS_FPGA
TDO_FPGA
DA
T
A
0
ASDO
DCLK
nCSO
AMBI_SCL
DCLK
SCL
AMBI_SDA
B6K
B6K
H_17740_013.eps
210108
3139 123 6359.2
Содержание 32PFL3403D/85
Страница 65: ...Circuit Diagrams and PWB Layouts 65 LC8 1U LA 7 Layout Small Signal Board Part 1 Bottom Side Part 1 ...
Страница 67: ...Circuit Diagrams and PWB Layouts 67 LC8 1U LA 7 Layout Small Signal Board Part 3 Bottom Side Part 3 ...
Страница 74: ...74 LC8 1U LA 7 Circuit Diagrams and PWB Layouts Personal Notes E_06532_013 eps 131004 ...
Страница 96: ...www s manuals com ...