OPTIMOD-FM DIGITAL
TECHNICAL DATA
6-11
tor that locks to the 27 MHz output of IC1101 and generates four clock signals
from it. The four outputs of IC1102 are applied to the CPLD, which closes the
phase-locked loop as directed by the PIC and main microprocessor. The CPLD
generates the clocks (FCLK and BCLK) used by the DSP.
Output Circuits
This circuitry interfaces the DSP to the analog and digital audio outputs. The digital
audio from the DSP is transmitted to the digital-to-analog converter (D/A) and out-
put sample rate converter (SRC). The digital-to-analog (D/A) converter converts the
digital audio words generated by the DSP to analog audio. The analog output stag-
es scale and buffer the D/A output signal to drive the analog output XLR connectors
with a low impedance balanced output. The digital output transmitter accepts the
digital audio words from the output sample rate converter (SRC) and transmits them
as AES3-format digital audio signals on the digital output connector.
Stereo Digital-to-Analog (D/A) Converter
Located on Input/Output/DSP board
The D/A, IC306, is a stereo, 24-bit delta-sigma converter. It receives the serial left
and right audio data samples from the DSP at 64 kHz sample rate and converts
them into audio signals requiring further, relatively undemanding analog filter-
ing.
Analog Output Stages
Located on Input/Output/DSP board
The left and right analog signals emerging from IC306 are each filtered, ampli-
fied, and applied to a floating-balanced integrated line driver, which has a 50
Ω
output impedance. The line driver outputs are applied to the RF-filtered left and
right analog output connectors. These analog signals can represent either the
transmitter or monitor output of audio processing.
Component-Level Description:
IC303 and associated components filter the left channel signal emerging from
IC306. The purpose of these stages is to reduce the out-of-band noise energy
resulting from the delta-sigma D/A’s noise-shaping filter and to translate the
differential output of the D/A converter into single-ended form. These com-
ponents apply a 3
rd
order low-pass filter to the differential signal from the D/A.
This filter does not induce significant overshoot of the processed audio, which
would otherwise waste modulation.
IC305B and associated components form a low-frequency servo amplifier to
remove residual DC from the signal. The 0.1Hz
−
3 dB frequency prevents tilt-
induced overshoot in the processed audio.
The buffered output of IC303B is passed through gain trimmer VR301, which
allows the gain of the output circuitry to be calibrated to a standard. IC301, a
balanced output line driver, receives the output of VR301. This driver emulates
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