LTDVE8CH-20 – INSTRUCTION MANUAL
2
12.6. Output protection
.................................................................................................................. 23
12.7. Free running oscillator
.......................................................................................................... 25
13. Wiring diagrams
........................................................................................................................... 25
13.1. Wiring example #1: controller triggers camera
..................................................................... 25
13.2. Wiring example #2: camera triggers controller
..................................................................... 26
14. Operation
...................................................................................................................................... 26
14.1. Operation with Modbus
........................................................................................................ 27
14.1.1. Comparison of Modbus/RTU, Modbus/TCP and Modbus/UDP
................................... 27
14.1.2. Supported function codes
............................................................................................... 27
14.1.3. Read Holding Registers (0x03)
...................................................................................... 28
14.1.4. Write Single Register (0x06)
.......................................................................................... 28
14.1.5. Write Multiple Registers (0x10)
.................................................................................... 28
14.2. Register file
........................................................................................................................... 28
14.2.1. Register DEVICE_TYPE
............................................................................................... 41
14.2.2. Register BOOT_VERSION
........................................................................................... 41
14.2.3. Register MCU_VERSION
............................................................................................. 41
14.2.4. Register FPGA_VERSION
............................................................................................ 41
14.2.5. Register BOARD_VERSION
........................................................................................ 42
14.2.6. Register OSC_PERIOD
................................................................................................. 42
14.2.7. Registers FILTER_SEL[0:7]
.......................................................................................... 42
14.2.8. Registers INPUT_SEL[0:15]
......................................................................................... 42
14.2.9. Registers GEN_DLY_BASE[0:15]
................................................................................ 43
14.2.10. Registers GEN_DLY_CNT[0:15]
................................................................................ 44
14.2.11. Registers GEN_WDT_BASE[0:15]
............................................................................. 45
14.2.12. Registers GEN_WDT_CNT[0:15]
............................................................................... 46
14.2.13. Registers OUTPUT_SEL_HI[0:15]
............................................................................. 46
14.2.14. Registers OUTPUT_SEL_LO[0:15]
............................................................................ 48
14.2.15. Registers PRT_CNT_ON[0:7]
..................................................................................... 48
14.2.16. Registers PRT_ENA_ON[0:7]
..................................................................................... 49
14.2.17. Registers PRT_CNT_OFF[0:7]
.................................................................................... 49
14.2.18. Registers PRT_ENA_OFF[0:7]
................................................................................... 50
14.2.19. Registers CUR_RANGE[0:7]
...................................................................................... 50
14.2.20. Registers CUR_VALUE[0:7]
....................................................................................... 51
14.2.21. Register RS485_MODBUS_ADDR
............................................................................ 51
14.2.22. Register RS485_LINE_SPEED
................................................................................... 51
14.2.23. Register RS485_LINE_PARITY
................................................................................. 52
14.2.24. Registers ETH_MAC_ADDR[0:2]
.............................................................................. 52