Omron SYSMAC C200H-CT001-V1, Руководство по эксплуатации

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In sampling mode, IN1 is the count signal.
In latch mode, IN1 is the count signal and IN2 the latch signal.
Error Flag Word n+4, bit 05
The error flag is turned ON whenever an error has occurred. Information on the
type and location of the error is available in IR word n+5 upon execution of READ
ERROR.
READ ERROR Command Word n, bit 05
READ ERROR can be set to access information on the error whenever the error
flag is ON. Error information is output to IR word n+5. If more than one error has
occurred, information on other errors can be output to IR word n+5 by again set-
ting READ ERROR.
Error Location Word n+5, bit 07 through 00
The error location gives the rightmost two digits of the DM address, i.e., the bit
number, where the data causing the error is stored.
Error Code Word n+5, bit 15 through 08
Error codes indicate the nature of the error and are given in Appendix A Error
Code List.
Counting Flag Word n+4, bit 00
The counting flag is ON whenever the Counter Unit is counting.
IN1 Flag Word n+4, bit 02
The IN1 flag indicates the status of control input IN1. When the flag is ON, the
input is high; when the flag is OFF, the input is low. This flag can be accessed
during counting.
IN2 Flag Word n+4, bit 03
The IN2 flag indicates the status of control input IN2. When the flag is ON, the
input is high; when the flag is OFF, the input is low. This flag can be accessed
during counting.
Count Overflow Flag Word n+4, bit 06
The count overflow flag is turned ON when the counter value is incremented
passed 8,388,607. This flag turns OFF when the next operation is started.
Current Counter Value Word n+6 and n+7
Between –8,388,608 and 8,388,607
The current counter value is accessible in words n+6 and n+7 as 6 BCD digits
with a sign digit.
4-4-4 Timing Charts
The following four charts show the relationship between the input and output bits
in the two types of gate mode, the latch mode, and the sampling mode.
Gate, Latch, and Sampling Modes
Section 4-4