Inverter Interface
SECTION 5
5-4-3
Transfer Timing Chart
The diagram below shows the timing of the Transfer command with a normal
completion. The timing is the same for reading and writing.
21000 (R) or 21001 (W)
(Transfer Command Bit)
20603
(Transfer Busy Flag)
20602
(Transfer Error Flag)
DM(K)
(Transfer Response)
20601
(Transfer Completion Flag)
1.
2.
3.
Operation
1
.
When the Transfer Command Bit is turned ON, the Transfer Busy Flag will
turn ON one PLC cycle later, and the command specified in the DM Area (L)
will be processed.
2
.
When the Transfer Completion Flag is turned ON, the response is present in
the DM Area (K).
3
.
When the Transfer Command Bit is turned OFF, the Transfer Busy Flag and
Transfer Completion Flag will turn OFF one PLC cycle later.
Timing
The time required for the Transfer command (between 1. and 2.) depends on
the PLC cycle time and the presence of the Digital Operator according the
table below:
Digital Operator
Minimum
Maximum
No
1 PLC cycle
6 ms
Yes
1 PLC cycle
24 ms
64
Содержание 3G3MV-P10CDT-E
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