40496501TH Draft Version
B-2
2.
OPERATION DESCRIPTION
2.1
Element Description
(1)
80C51 with MASK ROM
An eight-bit microprocessor controller that controls the following:
(a.)Serial interface protocol and data transfer through a serial port.
(b.)Message buffer.
(c.)Transmission of parallel data to the printer.
(2)
SN75189
An RS-232C standard line receiver
(3)
SN75188
An RS-232C standard line driver.
(4)
2764
An 8 kbyte ROM that contains the serial interface control program.
(5)
HM6264
An 8192-byte static RAM used as a message buffer.
2.2
Circuit Description
A block diagram is shown in Figure B-2-1.
Содержание PACEMARK 4410
Страница 1: ...PACEMARK 4410 PRINTER SERVICE HANDBOOK...
Страница 52: ...40496501TH Draft Version 52 Figure 3 1 3 2 Parts Layout...
Страница 95: ...40496501TH Draft Version 95...
Страница 151: ...40496501TH Draft Version 151 No Yes End Replace PHA Board Recovered No Yes End Replace PMA Board...
Страница 168: ...XXXXXXXXTH Draft Version 8 5 Fig 8 5 45 38 38 40 42 39 44 44 122 41...
Страница 169: ...XXXXXXXXTH Draft Version 8 6 142 141 11 119 Fig 8 6...
Страница 170: ...XXXXXXXXTH Draft Version 8 7 Fig 8 7 105 102 61 33 104 100 101...
Страница 171: ...XXXXXXXXTH Draft Version 8 8 Fig 8 8 55...