2002 Nov 22
4
NXP Semiconductors
Preliminary specification
48 kHz IEC 60958 audio DAC
UDA1352TS
5
QUICK REFERENCE DATA
V
DDD
= V
DDA
= 3.0 V; IEC 60958 input with f
s
= 48.0 kHz; T
amb
= 25
°
C; R
L
= 5 k
Ω
; all voltages measured with respect
to ground; unless otherwise specified.
Note
1. The output voltage of the DAC is proportional to the DAC power supply voltage.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
V
DDD
digital supply voltage
2.7
3.0
3.6
V
V
DDA
analog supply voltage
2.7
3.0
3.6
V
I
DDA(DAC)
analog supply current of DAC
power-on
−
3.3
−
mA
power-down; clock off
−
35
−
μ
A
I
DDA(PLL)
analog supply current of PLL
−
0.3
−
mA
I
DDD(C)
digital supply current of core
−
9
−
mA
I
DDD
digital supply current
−
0.3
−
mA
P
power dissipation
DAC in playback mode
−
38
−
mW
DAC in Power-down mode
−
tbf
−
mW
General
t
rst
reset active time
−
250
−
μ
s
T
amb
ambient temperature
−
40
−
+85
°
C
Digital-to-analog converter
V
o(rms)
output voltage (RMS value)
f
i
= 1.0 kHz tone at 0 dBFS; note 1
850
900
950
mV
Δ
V
o
unbalance of output voltages
f
i
= 1.0 kHz tone
−
0.1
0.4
dB
(THD+N)/S
total harmonic
distortion-plus-noise to signal
ratio
f
i
= 1.0 kHz tone
at 0 dBFS
−
−
82
−
77
dB
at
−
40 dBFS; A-weighted
−
−
60
−
52
dB
S/N
signal-to-noise ratio
f
i
= 1.0 kHz tone; code = 0; A-weighted 95
100
−
dB
α
cs
channel separation
f
i
= 1.0 kHz tone
−
110
−
dB
